Ev67 Block Diagram - Compaq 21264 Hardware Reference Manual

Compaq microprocessor reference manual
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Figure 2–1 21264/EV67 Block Diagram
Ibox
Virtual Address
Fetch Unit
VPC
Next Address
Queue
Branch
Predictor
Integer Issue Queue
(20 Entries)
Ebox
Address
INT
ALU 0
UNIT
(L0)
0
(U0)
Integer Registers 0
(80 Registers)
Mbox
DTB
(Dual-ported, 128-entry)
Physical
Address
Dual-Ported Data Cache
2.1.1.2 Branch Predictor
The branch predictor is composed of three units: the local, global, and choice predic-
tors. Figure 2–2 shows how the branch predictor generates the predicted branch
address.
Alpha 21264/EV67 Hardware Reference Manual
Instruction Cache
ITB
Retire
Unit
Fbox
INT
Address
UNIT
ALU 1
(L1)
1
(U1)
Integer Registers 1
(80 Registers)
Load
Store
Miss Address
Queue
Queue
File
Data
21264/EV67 Microarchitecture
Four
Instructions
Predecode
Decode and
128
Rename Registers
FP Issue Queue
Cbox
(15 Entries)
Probe
Queue
Duplicate
FP
FP
Tag Store
ADD
MUL
DIV
SQRT
IOWB
Victim
Buffer
FP Registers
(72 Registers)
Arbiter
Physical
Address
Cache
Data
128
Cache
Index
20
System
Bus
64
System
Address
15
Data
128
FM-05642-AI4
Internal Architecture
2–3

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