Instruction Group Definitions; Instruction Name, Pipeline, And Types - Compaq 21264 Hardware Reference Manual

Compaq microprocessor reference manual
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2.3.1 Instruction Group Definitions

Table 2–2 lists the instruction class, the pipeline assignments, and the instructions
included in the class.
Table 2–2 Instruction Name, Pipeline, and Types
Class
Name
ild
fld
ist
fst
lda
mem_misc
rpcc
rx
mxpr
ibr
jsr
iadd
ilog
ishf
cmov
imul
imisc
fbr
fadd
fmul
fcmov1
fcmov2
fdiv
fsqrt
nop
Alpha 21264/EV67 Hardware Reference Manual
Pipeline
Instruction Type
L0, L1
All integer load instructions
L0, L1
All floating-point load instructions
L0, L1
All integer store instructions
FST0, FST1, L0, L1 All floating-point store instructions
L0, L1, U0, U1
LDA, LDAH
L1
WH64, ECB, WMB
L1
RPCC
L1
RS, RC
L0, L1
HW_MTPR, HW_MFPR
(depends on IPR)
U0, U1
Integer conditional branch instructions
L0
BR, BSR, JMP, CALL, RET, COR, HW_RET,
CALL_PAL
L0, U0, L1, U1
Instructions with opcode 10
L0, U0, L1, U1
AND, BIC, BIS, ORNOT, XOR, EQV, CMPBGE
U0, U1
Instructions with opcode 12
L0, U0, L1, U1
Integer CMOV — either cluster
U1
Integer multiply instructions
U0
CTLZ, CTPOP, CTTZ, PERR, MINxxx, MAXxxx, PKxx,
UNPKxx
FA
Floating-point conditional branch instructions
FA
All floating-point operate instructions except multiply,
divide, square root, and conditional move instructions
FM
Floating-point multiply instruction
FA
Floating-point CMOV—first half
FA
Floating-point CMOV— second half
FA
Floating-point divide instruction
FA
Floating-point square root instruction
None
TRAP, EXCB, UNOP - LDQ_U R31, 0(Rx)
Instruction Issue Rules
, except CMPBGE
16
16
Internal Architecture
2–17

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