This chapter describes the 21264/EV67 user-oriented testability and diagnostic fea-
tures. These features include automatic power-up self-test, Icache initialization from
external serial ROMs, and the serial diagnostic terminal port.
The boundary-scan register, which is another testability and diagnostic feature, is listed
in Appendix B. The boundary-scan register is compatible with IEEE Standard 1149.1.
This chapter is organized as follows:
•
Test pins
•
SROM/serial diagnostic terminal port
•
IEEE 1149.1 port
•
TestStat_H pin
•
Power-up self-test and initialization
•
Notes on IEEE 1149.1 operation and compliance
The 21264/EV67 has several manufacturing test features that are used only by the fac-
tory, and they are beyond the scope of this chapter.
11.1 Test Pins
The 21264/EV67 test access ports include the IEEE 1149.1 test access port, a dual-pur-
pose SROM/Serial diagnostic terminal port, and a test status output pin. Table 11–1 lists
the test access port pins.
Table 11–1 Dedicated Test Port Pins
Pin Name
Tms_H
Tdi_H
Trst_L
Tck_H
Tdo_H
SromData_H
Alpha 21264/EV67 Hardware Reference Manual
Testability and Diagnostics
Type
Function
Input
IEEE 1149.1 test mode select
Input
IEEE 1149.1 test data in
Input
IEEE 1149.1 test logic reset
Input
IEEE 1149.1 test clock
Output
IEEE 1149.1 test data output
Input
SROM data/Diagnostic terminal data input
Testability and Diagnostics
11
11–1