Data Wrapping; Sysfillvalid_L Timing; Data Wrapping Rules - Compaq 21264 Hardware Reference Manual

System Port
Figure 4–6 SysFillValid_L Timing
SysAddIn_L[14:0]
Command Receiver
SysFillValid_L
SysData_L[63:0]

4.7.8.6 Data Wrapping

All data movement between the 21264/EV67 and the system is composed of 64 bytes in
eight cycles on the data bus. All 64 bytes of memory data are valid. This applies to
memory read transactions, memory write transactions, and system probe read transac-
tions. The wrap order is interleaved. The internal data bus, which delivers data to the
functional units and the Dcache, is 16 bytes wide, and so, no transfers happen until two
data cycles occur on the interface.
Table 4–28 lists the rules for data wrapping. I/O read and write addresses on the
SysAddOut bus point to the desired byte, word, LW, or QW, with a combination of
SysAddOut_L[5:3] and the mask field [7:0].
Table 4–28 Data Wrapping Rules
Significant Address
Command Bits
ReadQW and SysAddOut_L[5:3]
WrQW
ReadLW and SysAddOut_L[5:3]
WrLW
LDByte/Word SysAddOut_L[5:3]
and
STByte/Word
The order in which data is provided to the 21264/EV67 (for a memory or I/O fill) or
moved from the 21264/EV67 (write victims or probe reads) can be determined by the
system. The system chooses to reflect back the same low-order address bits and the cor-
responding octaword found in the SysAddOut field or the system chooses any other
starting point within the block.
SysDc commands for the ReadData, ReadDataShared, and WriteData groups require
that systems define the position of the first QW by inserting the appropriate value of
SysAddOut_L[5:3] into bits [1:0] of the command field. The recommended starting
Cache and External Interfaces
4–36
SysDc
Transport Delay on Address
T3
Mask
Type Rules
QW SysAddOut_L[5:3] contains the exact PA bits of the first
LDQ or STQ to the block. The mask bits point to the valid
QWs merged in ascending order.
LW SysAddOut_L[5:3] contain the exact PA bits of the first
LDL or STL to the block. The mask bits point to the valid
LWs merged in ascending order within one hexword.
Byte SysAddOut_L[5:3] contain the exact QW PA bits of the
LDByte/Word or STByte/Word instruction. The mask bits
point to the valid byte in the QW.
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