Compaq 21264 Hardware Reference Manual page 178

Cbox CSRs and IPRs
Table 5–24 Cbox WRITE_ONCE Chain Order (Continued)
Cbox WRITE_ONCE Chain
BC_TAG_DDM_RISE_EN[0]
BC_CLKFWD_ENABLE[0]
BC_RCV_MUX_CNT_PRESET[0:1]
BC_LATE_WRITE_UPPER[0]
SYS_DDM_FALL_EN[0]
SYS_DDM_RISE_EN[0]
SYS_CLKFWD_ENABLE[0]
SYS_RCV_MUX_CNT_PRESET[0:1]
SYS_CLK_DELAY[0:1]
SYS_DDMR_ENABLE[0]
SYS_DDMF_ENABLE[0]
BC_DDM_FALL_EN[0]
BC_DDM_RISE_EN[0]
BC_CLKFWD_ENABLE
BC_RCV_MUX_CNT_PRESET[0:1]
BC_CLK_DELAY[0:1]
BC_DDMR_ENABLE
BC_DDMF_ENABLE
SYS_DDM_FALL_EN
SYS_DDM_RISE_EN
SYS_CLKFWD_ENABLE
SYS_RCV_MUX_CNT_PRESET[0:1]
SYS_CLK_DELAY[0:1]
SYS_DDMR_ENABLE
SYS_DDMF_ENABLE
BC_DDM_FALL_EN
BC_DDM_RISE_EN
BC_CLKFWD_ENABLE
BC_RCV_MUX_CNT_PRESET[0:1]
Internal Processor Registers
5–36
Description
Enables the update of the 21264/EV67 Bcache tag outputs based on
the rising edge of the forwarded clock.
Enable clock forwarding on the Bcache interface.
Initial value for the Bcache clock forwarding unload pointer FIFO.
Duplicate CSR.
Enables the update of the 21264/EV67 system outputs based on the
falling edge of the system forwarded clock.
Enables the update of the 21264/EV67 system outputs based on the
rising edge of the system forwarded clock.
Enables clock forwarding on the system interface.
Initial value for the system clock forwarding unload pointer FIFO.
Delay of 0 to 2 phases between the forwarded clock out and
address/data.
Enables the rising edge of the system forwarded clock (always
enabled).
Enables the falling edge of the system forwarded clock (always
enabled).
Enables update of data/address on the rising edge of the system for-
warded clock.
Enables the update of data/address on the falling edge of the system
forwarded clock.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Duplicate CSR.
Alpha 21264/EV67 Hardware Reference Manual