Translation Of Internal References To External Interface Reference - Compaq 21264 Hardware Reference Manual

Prefetches (LDL, LDF, LDG, LDT, LDBU, LDWU) to R31 use the LDx flow, and
prefetch with modify intent (LDS) uses the STx flow. If the prefetch target is addressed
to I/O space, the upper address bit is cleared, converting the address to memory space
(PA[42:6] ). Notes follow the table.
Table 4–1 Translation of Internal References to External Interface Reference
Instruction DcHit
LDx Memory 1
LDx Memory 0
LDx Memory 0
LDx I/O X
Istream Memory 1
Istream Memory 0
Istream Memory 0
STx Memory 1
STx Memory 1
STx Memory 0
STx Memory 0
STx Memory 0
STx I/O X
STx_C Memory 0
STx_C Memory 1
STx_C I/O X
WH64 Memory 1
WH64 Memory 1
WH64 Memory 0
WH64 Memory 0
WH64 Memory 0
WH64 I/O X
ECB Memory X
ECB I/O X
MB/WMB X
TB Fill Flows
Alpha 21264/EV67 Hardware Reference Manual
DcW BcHit BcW Status and Action
X X X Dcache hit, done.
X 1 X Bcache hit, done.
X 0 X Miss, generate RdBlk command.
X X X RdBytes, RdLWs, or RdQWs based on size.
X X X Dcache hit, Istream serviced from Dcache.
X 1 X Bcache hit, Istream serviced from Bcache.
X 0 X Miss, generate RdBlkI command.
1 X X Store Dcache hit and writable, done.
0 X X Store hit and not writable, set dirty flow (note 1).
X 1 1 Store Bcache hit and writable, done.
X 1 0 Store hit and not writable, set-dirty flow (note 1).
X 0 X Miss, generate RdBlkMod command.
X X X WrBytes, WrLWs, or WrQWs based on size.
X X X Fail STx_C.
0 X X STx_C hit and not writable, set dirty flow (note 1).
X X X Always succeed and WrQws or WrLws are generated,
based on the size.
1 X X Hit, done.
0 X X WH64 hit not writable, set dirty flow (note 1).
X 1 1 WH64 hit dirty, done.
X 1 0 WH64 hit not writable, set dirty flow (note 1).
X 0 X Miss, generate InvalToDirty command (note 2).
X X X NOP the instruction. WH64 is UNDEFINED for I/O
space.
X X X Generate evict command (note 3).
X X X NOP the instruction. ECB instruction is UNDEFINED
for I/O space.
X X X Generate MB command (note 4). See Section 2.12.1.
Physical Address Considerations
Cache and External Interfaces
4–5