Compaq 21264 Hardware Reference Manual page 303

Restriction 1 : Reset Sequence Required by Retire Logic and Mapper
addq r31,r31,r21
br r31, nxt8
tch7: br r31, tch8
nxt8: addq r31,r31,r22
addq r31,r31,r23
br r31, nxt9
tch8: br r31, nxt0
nxt9:
/*
** INIT_WRITE_MANY
**
** Write the cbox write many chain, initializing the bcache configuration.
**
** This code is on a cache block boundary,
**
** *** the bcache is initialized OFF for the burnin test ***
*/
/*
** Because we aligned on and fit into a icache block, and because sbe=0,
** and because we do an mb at the beginning (which blocks further progress
** until the entire block has been fetched in), we don't have to
** fool with pulling this code in before executing it.
*/
#undef bc_enable_a
#undef init_mode_a
#undef bc_size_a
#undef zeroblk_enable_a
#undef enable_evict_a
#undef set_dirty_enable_a
#undef bc_bank_enable_a
#undef bc_wrt_sts_a
#define bc_enable_a
#define init_mode_a
#define bc_size_a
#define zeroblk_enable_a
#define enable_evict_a
#define set_dirty_enable_a
#define bc_bank_enable_a
#define bc_wrt_sts_a
loadwm:
lda r1, WRITE_MANY_CHAIN_H(r31)
sll r1, 32, r1
LDLI(r1, WRITE_MANY_CHAIN_L, r1)
addq r31,6,r0
mb
br r31, bccshf
.align 6
bccshf:mtpr r1,EV6__DATA
subq r0,1,r0
beq r0,bccend
srl
Alpha 21264/EV67 Hardware Reference Manual
/* initialize Shadow Reg. 5*/
/* continue executing in next block*/
/* fetch in next block*/
/* initialize Shadow Reg. 6*/
/* initialize Shadow Reg. 7*/
/* continue executing in next block*/
/* go back to 1st block and start executing*/
0
0
0
1
0
0
0
0
/* data<35:32> */
/* shift in 6x 6-bits*/
/* wait for all istream/dstream to complete*/
r1,6,r1
/* data<31:00> */
/* shift in 6 bits*/
/* decrement R0*/
/* done if R0 is zero*/
/* align next 6 bits*/
PALcode Restrictions and Guidelines
D–5