Compaq 21264 Hardware Reference Manual page 302

Compaq microprocessor reference manual
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Restriction 1 : Reset Sequence Required by Retire Logic and Mapper
** or the PALcode, but it must be done in the manner and order below.
**
** It assumes that the retirator has been initialized, that the
** non-shadow registers are mapped, and that mapper source enables are on.
**
** Source enables are on. For fault-reset and wake from sleep, we need to
** ensure we are in the icache so we don't fetch junk that touches the
** shadow sources before we write the destinations. For normal reset,
** we are already in the icache. However, so this macro is useful for
** all cases, force the code into the icache before doing the mapping.
**
** Assume for fault-reset, and wake from sleep case, the exc_addr is
** stored in r1.
*/
addq
r31,r31,r0
addq
r31,r31,r0
addq
r31,r31,r0
br
r31, tch0
.align 3
nxt0: lda
r0,0x0086(r31)
mtpr
r0,EV6__I_CTL
br
r31, nxt1
tch0: br
r31, tch1
nxt1: mtpr r31,EV6__IER_CM
addq
r31,r31,r0
br
r31, nxt2
tch1: br
r31, tch2
nxt2: addq
r31,r31,r0
addq
r31,r31,r0
br
r31, nxt3
tch2: br
r31, tch3
nxt3: addq
r31,r31,r0
addq
r31,r31,r0
br
r31, nxt4
tch3: br
r31, tch4
nxt4: addq
r31,r31,r0
addq
r31,r31,r0
br
r31, nxt5
tch4: br
r31, tch5
nxt5: addq
r31,r31,r4
addq
r31,r31,r5
br
r31, nxt6
tch5: br
r31, tch6
nxt6: addq
r31,r31,r6
addq
r31,r31,r7
br
r31, nxt7
tch6: br
r31, tch7
nxt7: addq
r31,r31,r20
PALcode Restrictions and Guidelines
D–4
/* nop*/
/* nop*/
/* nop*/
/* fetch in next block*/
/* load I_CTL.....*/
/* .....SDE=2, IC_EN=3 (SCRBRD=4)*/
/* continue executing in next block*/
/* fetch in next block*/
/* clear IER_CM (SCRBRD=4) creates a map-stall
under the above mtpr to SCRBRD=4*/
/* nop*/
/* continue executing in next block*/
/* fetch in next block*/
/* 1st buffer fetch block for above map-
stall*/
/* nop*/
/* continue executing in next block*/
/* fetch in next block*/
/* 2nd buffer fetch block for above map-stall*/
/* nop*/
/* continue executing in next block*/
/* fetch in next block*/
/* need 3rd buffer fetch block to get correct
SDE bit for next fetch block*/
/* nop*/
/* continue executing in next block*/
/* fetch in next block*/
/* initialize Shadow Reg. 0*/
/* initialize Shadow Reg. 1*/
/* continue executing in next block*/
/* fetch in next block*/
/* initialize Shadow Reg. 2*/
/* initialize Shadow Reg. 3*/
/* continue executing in next block*/
/* fetch in next block*/
/* initialize Shadow Reg. 4*/
Alpha 21264/EV67 Hardware Reference Manual

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