Opcode Summary; A.6 Opcode Summary; Independent Floating-Point Instruction Function Codes; A–8 Opcode Summary - Compaq 21264 Hardware Reference Manual

Opcode Summary

Table A–7 Independent Floating-Point Instruction Function Codes
Mnemonic
CPYS
CPYSE
CPYSN
CVTLQ
CVTQL
FCMOVEQ
FCMOVGE
FCMOVGT
FCMOVLE
FCMOVLT
MF_FPCR
MT_FPCR

A.6 Opcode Summary

Table A–8 lists all Alpha opcodes from 00 (CALL_PAL) through 3F (BGT). In the
table, the column headings that appear over the instructions have a granularity of 8
The rows beneath the Offset column supply the individual hexadecimal number to
resolve that granularity.
If an instruction column has a 0 in the right (low) hexadecimal digit, replace that 0 with
the number to the left of the backslash (\) in the Offset column on the instruction's row.
If an instruction column has an 8 in the right (low) hexadecimal digit, replace that 8
with the number to the right of the backslash in the Offset column.
For example, the third row (2/A) under the 10
representing the all-integer shift instructions. The opcode for those instructions would
then be 12
third row under the 18
instructions. The opcode for those instructions is 1A because the 8 in the heading is
replaced by the number to the right of the backslash in the Offset column. The
instruction format is listed under the instruction symbol.
Table A–8 Opcode Summary
Offset 00 08
0/8
PAL* LDA
(pal) (mem)
1/9 Res LDAH
(mem)
2/A
LDBU Res
Alpha Instruction Set
A–12
None /V
020 —
022
—
021
—
010
—
030 130
02A
—
02D
—
02F
—
02E
—
02C
—
025
—
024
—
because the 0 in 10 is replaced by the 2 in the Offset column. Likewise, the
16
column contains the symbol JSR*, representing all jump
16
10 18 20
INTA* MISC* LDF
(op) (mem) (mem)
INTL* \ PAL \ LDG
(op) (mem)
INTS* JSR* LDS
(op) (mem) (mem)
/SV
—
—
—
—
530
—
—
—
—
—
—
—
column contains the symbol INTS*,
16
28 30
LDL BR
(mem) (br)
LDQ FBEQ
(mem) (br)
LDL_L FBLT
(mem) (br)
Alpha 21264/EV67 Hardware Reference Manual
.
16
38
BLBC
(br)
BEQ
(br)
BLT
(br)