Mbox Control Register - M_Ctl; Mbox Control Register - Compaq 21264 Hardware Reference Manual

Table 5–18 Memory Management Status Register Fields Description (Continued)
Name
FOR
ACV
WR
Note:
5.3.9 Mbox Control Register – M_CTL
The Mbox control register (M_CTL) is a write-only register. Its contents are cleared by
chip reset. Figure 5–32 shows the Mbox control register.
Figure 5–32 Mbox Control Register
63
SMC[1:0]
SPE[2:0]
Alpha 21264/EV67 Hardware Reference Manual
Extent Type Description
[2] RO This bit is set when a fault-on-read error occurs during a read
transaction and PTE[FOR] was set.
[1] RO This bit is set when an access violation occurs during a transac-
tion. Access violations include a bad virtual address.
[0] RO This bit is set when an error occurs during a write transaction.
The Ra field of the instruction that triggered the error can be obtained from
the Ibox EXC_SUM register.
Mbox IPRs
6 5 4 3
LK99-0040A
Internal Processor Registers
1 0
5–29