Hitachi H8/3035 Series Hardware Manual page 262

ITU Operating Modes
Table 8-11 (a) ITU Operating Modes (Channel 0)
TSNC
Synchro-
Operating Mode nization MDF
Synchronous preset SYNC0 = 1 —
PWM mode —
Output compare A —
Output compare B —
Input capture A —
Input capture B —
Counter By compare —
clearing match/input
capture A
By compare —
match/input
capture B
Syn- SYNC0 = 1 —
chronous
clear
Legend: Setting available (valid). — Setting does not affect this mode.
Note: * The input capture function cannot be used in PWM mode. If compare match A and compare match B occur simultaneously, the compare match signal is inhibited.
248
Register Settings
TMDR TFCR
Reset-
Comple- Synchro-
mentary nized Buffer-
FDIR PWM PWM PWM ing
— — — —
— PWM0 = 1 — — —
— PWM0 = 0 — — —
— — — —
— PWM0 = 0 — — —
— PWM0 = 0 — — —
— — — —
— — — —
— — — —
TOCR TOER TIOR0
Output
Level Master
XTGD Select Enable IOA
— — —
— — — —
— — — IOA2 = 0
Other bits
unrestricted
— — — IOB2 = 0
— — — IOA2 = 1
Other bits
unrestricted
— — — IOB2 = 1
— — —
— — —
— — —
TCR0
Clear Clock
IOB Select Select
*
Other bits
unrestricted
Other bits
unrestricted
CCLR1 = 0
CCLR0 = 1
CCLR1 = 1
CCLR0 = 0
CCLR1 = 1
CCLR0 = 1