Register Descriptions - Hitachi H8/3035 Series Hardware Manual

Port B

7.11.2 Register Descriptions

Table 7-17 summarizes the registers of port B.
Table 7-17 Port B Registers
Address* Name
H'FFD4 Port B data direction register
H'FFD6 Port B data register
Note: * Lower 16 bits of the address.
Port B Data Direction Register (PBDDR): PBDDR is an 8-bit write-only register that can
select input or output for each pin in port B.
Bit 7
PB DDR
7
Initial value 0
Read/Write W
A pin in port B becomes an output pin if the corresponding PBDDR bit is set to 1, and an input
pin if this bit is cleared to 0.
154
Port B pins
PB (input/output)/TP
7
PB (input/output)/TP
6
PB (input/output)/TP
5
PB (input/output)/TP
4
PB (input/output)/TP
3
PB (input/output)/TP
2
PB (input/output)/TP
1
PB (input/output)/TP
0
Figure 7-20 Port B Pin Configuration
Abbreviation
PBDDR
PBDR
6 5 4
PB DDR PB DDR PB DDR
6 5 4
0 0 0
W W W
Port B data direction 7 to 0
These bits select input or output for port B pins
(output)/ADTRG (input)
15
(output)
14
(output)/TOCXB (output)
13 4
(output)/TOCXA (output)
4
12
(output)/TIOCB (input/output)
11 4
(output)/TIOCA (input/output)
10 4
(output)/TIOCB (input/output)
9 3
(output)/TIOCA (input/output)
8 3
R/W
W
R/W
3 2
PB DDR PB DDR
3 2
0 0
W W
Initial Value
H'00
H'00
1 0
PB DDR PB DDR
1 0
0 0
W W