Isr-Irq Status Register H'f6 Interrupt Controller - Hitachi H8/3035 Series Hardware Manual

ISR—IRQ Status Register
Bit 7
—
Initial value 0
Read/Write —
IRQ to IRQ flags
4
Bits 4 to 0
IRQ4F to IRQ0F
Note: Only 0 can be written, to clear the flag.
*
504
H'F6 Interrupt controller
6 5 4
— — IRQ4F
0 0 0
— — R/(W) *
0
Setting and Clearing Conditions
0 [Clearing conditions]
Read IRQnF when IRQnF = 1, then write 0 in IRQnF.
IRQn
IRQnSC = 0,
handling is carried out.
IRQnSC = 1 and IRQn interrupt exception handling is
carried out.
1 [Setting conditions]
IRQnSC = 0 and
IRQnSC = 1 and
3 2
IRQ3F IRQ2F IRQ1F
0 0
R/(W) * R/(W) * R/(W) *
input is high, and interrupt exception
IRQn
input is low.
IRQn
input changes from high to low.
1 0
IRQ0F
0 0
R/(W) *
(n = 4 to 0)