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7.11.3 Pin Functions ................................................................................................... 156
Section 8 16-Bit Integrated Timer Unit (ITU) ................................................161
8.1 Overview ........................................................................................................................ 161
8.1.1 Features ............................................................................................................. 161
8.1.2 Block Diagrams ................................................................................................. 164
8.1.3 Input/Output Pins............................................................................................... 169
8.1.4 Register Configuration....................................................................................... 170
8.2 Register Descriptions ...................................................................................................... 172
8.2.1 Timer Start Register (TSTR).............................................................................. 172
8.2.2 Timer Synchro Register (TSNC)........................................................................ 174
8.2.3 Timer Mode Register (TMDR) .......................................................................... 176
8.2.4 Timer Function Control Register (TFCR) .......................................................... 179
8.2.5 Timer Output Master Enable Register (TOER) .................................................. 181
8.2.6 Timer Output Control Register (TOCR)............................................................. 183
8.2.7 Timer Counters (TCNT) .................................................................................... 184
8.2.8 General Registers (GRA, GRB) ......................................................................... 185
8.2.9 Buffer Registers (BRA, BRB)............................................................................ 186
8.2.10 Timer Control Registers (TCR)........................................................................ 187
8.2.11 Timer I/O Control Register (TIOR).................................................................. 189
8.2.12 Timer Status Register (TSR) ............................................................................ 191
8.2.13 Timer Interrupt Enable Register (TIER)........................................................... 193
8.3 CPU Interface ................................................................................................................. 195
8.3.1 16-Bit Accessible Registers ............................................................................... 195
8.3.2 8-Bit Accessible Registers ................................................................................. 197
8.4 Operation ........................................................................................................................ 198
8.4.1 Overview ........................................................................................................... 198
8.4.2 Basic Functions.................................................................................................. 200
8.4.3 Synchronization ................................................................................................. 207
8.4.4 PWM Mode ....................................................................................................... 209
8.4.5 Reset-Synchronized PWM Mode ....................................................................... 213
8.4.6 Complementary PWM Mode ............................................................................. 215
8.4.7 Phase Counting Mode ........................................................................................ 224
8.4.8 Buffering ........................................................................................................... 227
8.4.9 ITU Output Timing............................................................................................ 232
8.5 Interrupts ........................................................................................................................ 234
8.5.1 Setting of Status Flags ....................................................................................... 234
8.5.2 Clearing of Status Flags ..................................................................................... 236
8.5.3 Interrupt Sources................................................................................................ 237
8.6 Usage Notes.................................................................................................................... 238
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