Interconnections With Memory (Example) - Hitachi H8/3035 Series Hardware Manual

6.3.4 Interconnections with Memory (Example)

For each area, the bus controller can select two- or three-state access. In three-state-access areas,
wait states can be inserted in a variety of modes, simplifying the connection of both high-speed
and low-speed devices.
Figure 6-10 shows a memory map for this example.
A 32-kword × 8-bit EPROM is connected to area 2. This device is accessed in three states via an
8-bit bus.
Two 32-kword × 8-bit SRAM devices (SRAM1 and SRAM2) are connected to area 3. These
devices are accessed in two states via an 8-bit bus.
One 32-kword × 8-bit SRAM (SRAM3) is connected to area 7. This device is accessed via an
8-bit bus, using three-state access with an additional wait state inserted in pin auto-wait mode.
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