Sci Interrupts; Usage Notes - Hitachi H8/3035 Series Hardware Manual

Single-chip microcomputer
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11.4 SCI Interrupts

The SCI has four interrupt request sources: TEI (transmit-end interrupt), ERI (receive-error
interrupt), RXI (receive-data-full interrupt), and TXI (transmit-data-empty interrupt). Table 11-
12 lists the interrupt sources and indicates their priority. These interrupts can be enabled and
disabled by the TIE, RIE, and TEIE bits in SCR. Each interrupt request is sent separately to the
interrupt controller.
The TXI interrupt is requested when the TDRE flag is set to 1 in SSR. The TEI interrupt is
requested when the TEND flag is set to 1 in SSR.
The RXI interrupt is requested when the RDRF flag is set to 1 in SSR. The ERI interrupt is
requested when the ORER, PER, or FER flag is set to 1 in SSR.
Table 11-12 SCI Interrupt Sources
Interrupt Description
ERI
Receive error (ORER, FER, or PER)
RXI
Receive data register full (RDRF)
TXI
Transmit data register empty (TDRE)
TEI
Transmit end (TEND)

11.5 Usage Notes

Note the following points when using the SCI.
TDR Write and TDRE Flag: The TDRE flag in SSR is a status flag indicating the loading of
transmit data from TDR into TSR. The SCI sets the TDRE flag to 1 when it transfers data from
TDR to TSR.
Data can be written into TDR regardless of the state of the TDRE flag. If new data is written in
TDR when the TDRE flag is 0, the old data stored in TDR will be lost because this data has not
yet been transferred to TSR. Before writing transmit data in TDR, be sure to check that the
TDRE flag is set to 1.
Simultaneous Multiple Receive Errors: Table 11-13 indicates the state of SSR status flags
when multiple receive errors occur simultaneously. When an overrun error occurs the RSR
contents are not transferred to RDR, so receive data is lost.
340
Priority
High
Low

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