Hitachi H8/3035 Series Hardware Manual page 169

PBDDR is a write-only register. Its value cannot be read. All bits return 1 when read.
PBDDR is initialized to H'00 by a reset and in hardware standby mode. In software standby
mode it retains its previous setting. If a PBDDR bit is set to 1, the corresponding pin maintains
its output state in software standby mode.
Port B Data Register (PBDR): PBDR is an 8-bit readable/writable register that stores data for
pins PB to PB .
7 0
Bit 7
PB
7
Initial value 0
Read/Write R/W
When a bit in PBDDR is set to 1, if port B is read the value of the corresponding PBDR bit is
returned directly. When a bit in PBDDR is cleared to 0, if port B is read the corresponding pin
level is read.
PBDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting.
When port B pins are used for TPC output, PBDR stores output data for TPC output groups 2
and 3. If a bit in the next data enable register (NDERB) is set to 1, the corresponding PBDR bit
cannot be written. In this case, PBDR can be updated only when data is transferred from NDRB.
6 5 4
PB PB PB
6 5 4
0 0 0
R/W R/W R/W
Port B data 7 to 0
These bits store data for port B pins
3 2 1
PB PB PB
3 2 1
0 0 0
R/W R/W R/W
0
PB
0
0
R/W
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