Tier0-Timer Interrupt Enable Register 0 H'66 Itu0 - Hitachi H8/3035 Series Hardware Manual

TIER0—Timer Interrupt Enable Register 0
Bit 7
—
Initial value 1
Read/Write —
460
H'66
6 5 4
— — —
1 1 1
— — —
Input capture/compare match interrupt enable A
0 IMIA interrupt requested by IMFA is disabled
1 IMIA interrupt requested by IMFA is enabled
Input capture/compare match interrupt enable B
0 IMIB interrupt requested by IMFB is disabled
1 IMIB interrupt requested by IMFB is enabled
Overflow interrupt enable
0 OVI interrupt requested by OVF is disabled
1 OVI interrupt requested by OVF is enabled
ITU0
3 2 1
— OVIE IMIEB
1 0 0
— R/W R/W
0
IMIEA
0
R/W