Hitachi H8/3035 Series Hardware Manual page 55

5 Absolute Address—@aa:8, @aa:16, or @aa:24: The instruction code contains the absolute
address of a memory operand. The absolute address may be 8 bits long (@aa:8), 16 bits long
(@aa:16), or 24 bits long (@aa:24). For an 8-bit absolute address, the upper 16 bits are all
assumed to be 1 (H'FFFF). For a 16-bit absolute address the upper 8 bits are a sign extension. A
24-bit absolute address can access the entire address space. Table 2-12 indicates the accessible
address ranges.
Table 2-12 Absolute Address Access Ranges
Absolute
Address 1-Mbyte Modes
8 bits (@aa:8) H'FFF00 to H'FFFFF
(1,048,320 to 1,048,575)
16 bits (@aa:16) H'00000 to H'07FFF, H'F8000 to
H'FFFFF
(0 to 32,767, 1,015,808 to 1,048,575)
24 bits (@aa:24) H'00000 to H'FFFFF
(0 to 1,048,575)
6 Immediate—#xx:8, #xx:16, or #xx:32: The instruction code contains 8-bit (#xx:8), 16-bit
(#xx:16), or 32-bit (#xx:32) immediate data as an operand.
The instruction codes of the ADDS, SUBS, INC, and DEC instructions contain immediate data
implicitly. The instruction codes of some bit manipulation instructions contain 3-bit immediate
data specifying a bit number. The TRAPA instruction code contains 2-bit immediate data
specifying a vector address.
7 Program-Counter Relative—@(d:8, PC) or @(d:16, PC): This mode is used in the Bcc and
BSR instructions. An 8-bit or 16-bit displacement contained in the instruction code is sign-
extended to 24 bits and added to the 24-bit PC contents to generate a 24-bit branch address. The
PC value to which the displacement is added is the address of the first byte of the next
instruction, so the possible branching range is –126 to +128 bytes (–63 to +64 words) or –32766
to +32768 bytes (–16383 to +16384 words) from the branch instruction. The resulting value
should be an even number.
8 Memory Indirect—@@aa:8: This mode can be used by the JMP and JSR instructions. The
instruction code contains an 8-bit absolute address specifying a memory operand. This memory
operand contains a branch address. The memory operand is accessed by longword access. The
first byte of the memory operand is ignored, generating a 24-bit branch address. See figure 2-10.
The upper bits of the 8-bit absolute address are assumed to be 0 (H'0000), so the address range is
0 to 255 (H'000000 to H'0000FF). Note that the first part of this range is also the exception
vector area. For further details see section 5, Interrupt Controller.
16-Mbyte Modes
H'FFFF00 to H'FFFFFF
(16,776,960 to 16,777,215)
H'000000 to H'007FFF,
H'FF8000 to H'FFFFFF
(0 to 32,767, 16,744,448 to 16,777,215)
H'000000 to H'FFFFFF
(0 to 16,777,215)
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