Serial Status Register (Ssr) - Hitachi H8/3035 Series Hardware Manual

Single-chip microcomputer
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11.2.7 Serial Status Register (SSR)

SSR is an 8-bit register containing multiprocessor bit values, and status flags that indicate the
SCI operating status.
Bit
7
TDRE
Initial value
1
Read/Write
R/(W)
*
Transmit data register empty
Status flag indicating that transmit data has been transferred from TDR into
TSR and new data can be written in TDR
Note:
Only 0 can be written, to clear the flag.
*
The CPU can always read and write SSR, but cannot write 1 in the TDRE, RDRF, ORER, PER,
and FER flags. These flags can be cleared to 0 only if they have first been read while set to 1.
The TEND and MPB flags are read-only bits that cannot be written.
SSR is initialized to H'84 by a reset and in standby mode.
6
5
4
RDRF
ORER
FER
0
0
0
R/(W)
R/(W)
R/(W)
*
*
Framing error
Status flag indicating detection of a receive
framing error
Overrun error
Status flag indicating detection of a receive overrun error
Receive data register full
Status flag indicating that data has been received and stored in RDR
3
2
PER
TEND
MPB
0
1
R/(W)
R
*
*
Multiprocessor bit
Stores the received
multiprocessor bit value
Transmit end
Status flag indicating end of
transmission
Parity error
Status flag indicating detection of
a receive parity error
1
0
MPBT
0
0
R
R/W
Multiprocessor
bit transfer
Value of multi-
processor bit to
be transmitted
301

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H8/3035H8/3034H8/3033

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