Realtek Ameba-D RTL872 D Series User Manual page 377

[15] ADC_R_BIQUAD_STATUS_1
17.6.4.33 0xCE ~ 0xCF
Address Bit Name
0xCE [15:0] ADC_R_BIQUAD_H0_2[15:0]
0xCF [12:0] ADC_R_BIQUAD_H0_2[28:16]
[15:13] RSVD
17.6.4.34 0xD0 ~ 0xD1
Address Bit Name
0xD0 [15:0] ADC_R_BIQUAD_B1_2[15:0]
0xD1 [12:0] ADC_R_BIQUAD_B1_2[28:16]
[15:13] RSVD
17.6.4.35 0xD2 ~ 0xD3
Address Bit Name
0xD2 [15:0] ADC_R_BIQUAD_B2_2[15:0]
0xD3 [12:0] ADC_R_BIQUAD_B2_2[28:16]
[15:13] RSVD
17.6.4.36 0xD4 ~ 0xD5
Address Bit Name
0xD4 [15:0] ADC_R_BIQUAD_A1_2[15:0]
0xD5 [12:0] ADC_R_BIQUAD_A1_2[28:16]
[15:13] RSVD
17.6.4.37 0xD6 ~ 0xD7
Address Bit Name
0xD6 [15:0] ADC_R_BIQUAD_A2_2[15:0]
0xD7 [12:0] ADC_R_BIQUAD_A2_2[28:16]
[13] ADC_R_BIQUAD_EN_2
[14] ADC_R_BIQUAD_WCLR_2
[15] ADC_R_BIQUAD_STATUS_2
User Manual
R 1'b0
Access Reset
R/W 16'h0000
R/W 13'h0200
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
R/W 1'b0
W 1'b0
R 1'b0
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377
Write "1" to send clear status pulse
ADC Rch 1st-band Biquad filter status

1'b0: Normal

1'b1: Overflow
Description
ADC Rch EQ 2nd-band coefficient h0
2's complement in 4.25 format, which means
that the range is from –8~7.99.
Reserved
Description
ADC Rch EQ 2nd-band coefficient b1
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
Description
ADC Rch EQ 2nd-band coefficient b2
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
Description
ADC Rch EQ 2nd-band coefficient a1
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
Description
ADC Rch EQ 2nd-band coefficient a2
2's complement in 4.25 format, which means that the
range is from –8~7.99.
ADC Rch 2nd-band EQ Biquad control

1'b0: Disable

1'b1: Enable
ADC Rch 2nd-band Biquad filter write clear

1'b0: Normal

1'b1: Overflow
Write "1" to send clear status pulse
ADC Rch 2nd-band Biquad filter status

1'b0: Normal

1'b1: Overflow
Audio Codec (AC)
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