Realtek Ameba-D RTL872 D Series User Manual page 272


Address offset: 0x48

Read/write access: read-only
31 30
Bit Name Access
31:1 RSVD N/A
0 CLR_RX_OVER R
13.3.2.20 IC_CLR_TX_OVER

Name: Clear TX_OVER Interrupt Register

Size: 32 bits

Address offset: 0x4C

Read/write access: read-only
31 30
Bit Name Access
31:1 RSVD N/A
0 CLR_TX_OVER R
13.3.2.21 IC_CLR_RD_REQ

Name: Clear RD_REQ Interrupt Register

Size: 32 bits

Address offset: 0x50

Read/write access: read-only
31 30
Bit Name Access
31:1 RSVD N/A
0 CLR_RD_REQ R
13.3.2.22 IC_CLR_TX_ABRT

Name: Clear TX_ABRT Interrupt Register

Size: 32 bits

Address offset: 0x54

Read/write access: read-only
31 30
Bit Name Access
31:1 RSVD N/A
0 CLR_TX_ABRT R
User Manual
29 ...
RSVD
Reset Description
- Reserved
0x0 Read this register to clear the RX_OVER interrupt (bit 1) of the IC_RAW_INTR_STAT register.
29 ...
RSVD
Reset Description
- Reserved
0x0 Read this register to clear the TX_OVER interrupt (bit 3) of the IC_RAW_INTR_STAT register.
29 ...
RSVD
Reset Description
- Reserved
0x0 Read this register to clear the RX_REQ interrupt (bit 5) of the IC_RAW_INTR_STAT register.
29 ...
RSVD
Reset Description
- Reserved
0x0 Read this register to clear the TX_ABRT interrupt (bit 6) of the IC_RAW_INTR_STAT register, and
the IC_TX_ABRT_SOURCE register.
All information provided in this document is subject to legal disclaimers.
3 2
3 2
3 2
3 2
272
Ameba-D User Manual
1 0
CLR_RX_OVER
R
1 0
CLR_TX_OVER
R
1 0
CLR_RD_REQ
R
1 0
CLR_TX_ABRT
R
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