Realtek Ameba-D RTL872 D Series User Manual page 221

Bit Name
31:28 RSVD
27 CC2M
26 CC2P
25 OC2PE
24 CC2E
23:16 RSVD
15:0 CCR2
10.4.3.12 TIMx Capture/Compare Register 3 (TIMx_CCR3)

Name: TIM5 capture/compare register 3

Address offset: 0x2C

Reset value: 0x00000000

Read/write access: read/write
31 30 29 28
RSVD
15 14 13 12
Bit Name
31:28 RSVD
27 CC3M
26 CC3P
25 OC3PE
24 CC3E
23:16 RSVD
15:0 CCR3
10.4.3.13 TIMx Capture/Compare Register 4 (TIMx_CCR4)

Name: TIM5 capture/compare register 4

Address offset: 0x30

Reset value: 0x00000000

Read/write access: read/write
31 30 29 28
RSVD
15 14 13 12
Bit Name
31:28 RSVD
27 CC4M
26 CC4P
25 OC4PE
24 CC4E
23:16 RSVD
15:0 CCR4
User Manual
Access Reset Description
N/A - Reserved
R/W 0 Refer to CC0M description in TIMx_CCR0
R/W 0 Refer to CC0P description in TIMx_CCR0
R/W 0 Refer to OC0PE description in TIMx_CCR0
R/W 0 Refer to CC0E description in TIMx_CCR0
N/A - Reserved
R/W 0 Refer to CCR0 description in TIMx_CCR0
27 26 25
CC3M CC3P OC3PE
R/W R/W R/W
11 10 9
Access Reset Description
N/A - Reserved
R/W 0 Refer to CC0M description in TIMx_CCR0
R/W 0 Refer to CC0P description in TIMx_CCR0
R/W 0 Refer to OC0PE description in TIMx_CCR0
R/W 0 Refer to CC0E description in TIMx_CCR0
N/A - Reserved
R/W 0 Refer to CCR0 description in TIMx_CCR0
27 26 25
CC4M CC4P OC4PE
R/W R/W R/W
11 10 9
Access Reset Description
N/A - Reserved
R/W 0 Refer to CC0M description in TIMx_CCR0
R/W 0 Refer to CC0P description in TIMx_CCR0
R/W 0 Refer to OC0PE description in TIMx_CCR0
R/W 0 Refer to CC0E description in TIMx_CCR0
N/A - Reserved
R/W 0 Refer to CCR0 description in TIMx_CCR0
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24 23 22 21
CC3E
R/W
8 7 6 5
CCR3
R/W
24 23 22 21
CC4E
R/W
8 7 6 5
CCR4
R/W
221
General Timers
20 19 18 17
RSVD
4 3 2 1
20 19 18 17
RSVD
4 3 2 1
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