Realtek Ameba-D RTL872 D Series User Manual page 361

[15:6] RSVD
17.6.3.2 0x2B~ 0x2C
Address Bit Name
0x2B [15:0] DAC_L_BIQUAD_H0_1[15:0]
0x2C [12:0] DAC_L_BIQUAD_H0_1[28:16]
[15:13] RSVD
17.6.3.3 0x2D ~ 0x2E
Address Bit Name
0x2D [15:0] DAC_L_BIQUAD_B1_1[15:0]
0x2E [12:0] DAC_L_BIQUAD_B1_1[28:16]
[15:13] RSVD
17.6.3.4 0x2F ~ 0x30
Address Bit Name
0x2F [15:0] DAC_L_BIQUAD_B2_1[15:0]
0x30 [12:0] DAC_L_BIQUAD_B2_1[28:16]
[15:13] RSVD
17.6.3.5 0x31 ~ 0x32
Address Bit Name
0x31 [15:0] DAC_L_BIQUAD_A1_1[15:0]
0x32 [12:0] DAC_L_BIQUAD_A1_1[28:16]
[15:13] RSVD
17.6.3.6 0x33 ~ 0x34
Address Bit Name
0x33 [15:0] DAC_L_BIQUAD_A2_1[15:0]
0x34 [12:0] DAC_L_BIQUAD_A2_1[28:16]
[13] DAC_L_BIQUAD_EN_1
[14] DAC_L_BIQUAD_WCLR_1
[15] DAC_L_BIQUAD_STATUS_1
User Manual
N/A 10'h0
Access Reset
R/W 16'h0000
R/W 13'h0200
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset Description
R/W 16'h0 DAC Lch EQ 1st-band coefficient a2
2's complement in 4.25 format, which means that the
R/W 13'h0
range is from –8~7.99.
R/W 1'b0 DAC Lch 1st-band EQ biquad control


W 1'b0 DAC Lch 1st-band Biquad filter write clear


Write "1" to send clear status pulse
R 1'b0 DAC Lch 1st-band Biquad filter status


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361

1'b1: Data zero cross
Reserved
Description
DAC Lch EQ 1st-band coefficient h0
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
Description
DAC Lch EQ 1st-band coefficient b1
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
Description
DAC Lch EQ 1st-band coefficient b2
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
Description
DAC Lch EQ 1st-band coefficient a1
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
1'b0: Disable
1'b1: Enable
1'b0: Normal
1'b1: Overflow
1'b0: Normal
1'b1: Overflow
Audio Codec (AC)
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