Realtek Ameba-D RTL872 D Series User Manual page 222

10.4.3.14 TIMx Capture/Compare Register 5 (TIMx_CCR5)

Name: TIM5 capture/compare register 5

Address offset: 0x34

Reset value: 0x00000000

Read/write access: read/write
31 30 29 28
RSVD
15 14 13 12
Bit Name
31:28 RSVD
27 CC5M
26 CC5P
25 OC5PE
24 CC5E
23:16 RSVD
15:0 CCR5
10.4.3.15 TIMx Capture/Compare Register 6 (TIMx_CCR6)

Name: TIM5 capture/compare register 6

Address offset: 0x38

Reset value: 0x00000000

Read/write access: read/write
31 30 29 28
RSVD
15 14 13 12
Bit Name
31:28 RSVD
27 CC6M
26 CC6P
25 OC6PE
24 CC6E
23:16 RSVD
15:0 CCR6
10.4.3.16 TIMx Capture/Compare Register 7 (TIMx_CCR7)

Name: TIM5 capture/compare register 7

Address offset: 0x3C

Reset value: 0x00000000

Read/write access: read/write
31 30 29 28
RSVD
User Manual
27 26 25
CC5M CC5P OC5PE
R/W R/W R/W
11 10 9
Access Reset Description
N/A - Reserved
R/W 0 Refer to CC0M description in TIMx_CCR0
R/W 0 Refer to CC0P description in TIMx_CCR0
R/W 0 Refer to OC0PE description in TIMx_CCR0
R/W 0 Refer to CC0E description in TIMx_CCR0
N/A - Reserved
R/W 0 Refer to CCR0 description in TIMx_CCR0
27 26 25
CC6M CC6P OC6PE
R/W R/W R/W
11 10 9
Access Reset Description
N/A - Reserved
R/W 0 Refer to CC0M description in TIMx_CCR0
R/W 0 Refer to CC0P description in TIMx_CCR0
R/W 0 Refer to OC0PE description in TIMx_CCR0
R/W 0 Refer to CC0E description in TIMx_CCR0
N/A - Reserved
R/W 0 Refer to CCR0 description in TIMx_CCR0
27 26 25
CC7M CC7P OC7PE
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24 23 22 21
CC5E
R/W
8 7 6 5
CCR5
R/W
24 23 22 21
CC6E
R/W
8 7 6 5
CCR6
R/W
24 23 22 21
CC7E
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Ameba-D User Manual
20 19 18 17
RSVD
4 3 2 1
20 19 18 17
RSVD
4 3 2 1
20 19 18 17
RSVD
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