Realtek Ameba-D RTL872 D Series User Manual page 372

17.6.4.7 0x9B ~ 0x9C
Address Bit Name
0x9B [15:0] ADC_L_BIQUAD_H0_2[15:0]
0x9C [12:0] ADC_L_BIQUAD_H0_2[28:16]
[15:13] RSVD
17.6.4.8 0x9D ~ 0x9E
Address Bit Name
0x9D [15:0] ADC_L_BIQUAD_B1_2[15:0]
0x9E [12:0] ADC_L_BIQUAD_B1_2[28:16]
[15:13] RSVD
17.6.4.9 0x9F ~ 0xA0
Address Bit Name
0x9F [15:0] ADC_L_BIQUAD_B2_2[15:0]
0xA0 [12:0] ADC_L_BIQUAD_B2_2[28:16]
[15:13] RSVD
17.6.4.10 0xA1 ~ 0xA2
Address Bit Name
0xA1 [15:0] ADC_L_BIQUAD_A1_2[15:0]
0xA2 [12:0] ADC_L_BIQUAD_A1_2[28:16]
[15:13] RSVD
17.6.4.11 0xA3 ~ 0xA4
Address Bit Name
0xA3 [15:0] ADC_L_BIQUAD_A2_2[15:0]
0xA4 [12:0] ADC_L_BIQUAD_A2_2[28:16]
[13] ADC_L_BIQUAD_EN_2
[14] ADC_L_BIQUAD_WCLR_2
[15] ADC_L_BIQUAD_STATUS_2
User Manual
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Access Reset
R/W 16'h0000
R/W 13'h0200
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset
R/W 16'h0
R/W 13'h0
N/A 3'b000
Access Reset Description
R/W 16'h0 ADC Lch EQ 2nd-band coefficient a2
2's complement in 4.25 format, which means that the
R/W 13'h0
range is from –8~7.99.
R/W 1'b0 ADC Lch 2nd-band EQ Biquad control
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W 1'b0 ADC Lch 2nd-band Biquad filter write clear
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Write "1" to send clear status pulse
R 1'b0 ADC Lch 2nd-band Biquad filter status
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372
1'b0: Normal
1'b1: Overflow
Description
ADC Lch EQ 2nd-band coefficient h0
2's complement in 4.25 format, which means
that the range is from –8~7.99.
Reserved
Description
ADC Lch EQ 2nd-band coefficient b1
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
Description
ADC Lch EQ 2nd-band coefficient b2
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
Description
ADC Lch EQ 2nd-band coefficient a1
2's complement in 4.25 format, which means that
the range is from –8~7.99.
Reserved
1'b0: Disable
1'b1: Enable
1'b0: Normal
1'b1: Overflow
1'b0: Normal
1'b1: Overflow
Ameba-D User Manual
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