Realtek Ameba-D RTL872 D Series User Manual page 277

31 30
9 8
ABRT_SBYTE_ ABRT_HS_N ABRT_SBYTE
NORSTRT ORSTRT
R R
Bit Name
31:15 RSVD
14 ABRT_SLV_ARBLOST
13 ABRT_SLVFLUSH_TXFIFO
12 ARB_LOST
11 ABRT_MASTER_DIS
10 ABRT_10B_RD_NORSTRT
9 ABRT_SBYTE_NORSTRT
8 ABRT_HS_NORSTRT
7 ABRT_SBYTE_ACKDET
6 ABRT_HS_ACKDET
5 ABRT_GCALL_READ
4 ABRT_GCALL_NOACK
3 ABRT_TXDATA_NOACK
2 ABRT_10ADDR2_NOACK
1 ABRT_10ADDR1_NOACK
0 ABRT_7B_ADDR_NOACK
13.3.2.34 IC_SLV_DATA_NACK_ONLY

Name: Generate Slave Data NACK Register

Size: 32 bits

Address offset: 0x84

Read/write access: read/write
User Manual
... 16 15
RSVD
7 6 5
ABRT_HS_ ABRT_GCAL
_ACKDET ACKDET L_READ
R R R
Access Reset Description
N/A - Reserved
R 0x0 1: Slave lost the bus while transmitting data to a remote
master. IC_TX_ABRT_SOURCE[12] is set at the same time.
R 0x0 1: Slave has received a read command and some data exists in
the Tx FIFO so the slave issues a TX_ABRT interrupt to flush
old data in Tx FIFO.
R 0x0 1: Master has lost arbitration, or if IC_TX_ABRT_SOURCE[14]
is also set, then the slave transmitter has lost arbitration.
Note: I
R 0x0 1: User tries to initiate a Master operation with the Master
mode disabled.
R 0x0 1: The restart is disabled (IC_RESTART_EN bit (IC_CON[5]) =
0) and the master sends a read command in 10-bit
addressing mode.
R 0x0 1: The restart is disabled (IC_RESTART_EN bit (IC_CON[5]) =
0) and the user is trying to send a START Byte.
R 0x0 1: The restart is disabled (IC_RESTART_EN bit (IC_CON[5]) =
0) and the user is trying to use the master to transfer data in
High Speed mode.
R 0x0 1: Master has sent a START Byte and the START Byte was
acknowledged (wrong behavior).
R 0x0 1: Master is in High Speed mode and the High Speed Master
code was acknowledged (wrong behavior).
2
R 0x0 1: I C in master mode sent a General Call but the user
programmed the byte following the General Call to be a read
from the bus (IC_DATA_CMD[9] is set to 1).
R 0x0 1: I 2 C in master mode sent a General Call and no slave on the
bus acknowledged the General Call.
R 0x0 1: This is a master-mode only bit. Master has received an
acknowledgement for the address, but when it sent data
byte(s) following the address, it did not receive an
acknowledge from the remote slave(s).
R 0x0 1: Master is in 10-bit address mode and the second address
byte of the 10-bit address was not acknowledged by any
slave.
R 0x0 1: Master is in 10-bit address mode and the first 10-bit
address byte was not acknowledged by any slave.
R 0x0 1: Master is in 7-bit addressing mode and the address sent
was not acknowledged by any slave.
All information provided in this document is subject to legal disclaimers.
14 13
ABRT_SLV_A ABRT_SLVFLUS
RBLOST H_TXFIFO
R R
4 3
ABRT_GCALL ABRT_TXDATA
_NOACK _NOACK
R R
2
C can be both master and slave at the same time.
277
Inter-integrated Circuit (I2C) Interface
12 11
ABRT_MASTER
ARB_LOST
_DIS
R R
2 1
ABRT_10ADDR ABRT_10ADDR
2_NOACK 1_NOACK
R R
Role of I
-
Slave-Transmitter
Slave-Transmitter
Master-Transmitter
or Slave-Transmitter
Master-Transmitter
or Master-Receiver
Master-Receiver
Master
Master-Transmitter
or Master-Receiver
Master
Master
Master-Transmitter
Master-Transmitter
Master-Transmitter
Master-Transmitter
or Master-Receiver
Master-Transmitter
or Master-Receiver
Master-Transmitter
or Master-Receiver
© REALTEK 2019. All rights reserved.
10
ABRT_10B_RD
_NORSTRT
R
0
ABRT_7B_ADD
R_NOACK
R
2 C