Realtek Ameba-D RTL872 D Series User Manual page 167

31 RSVD
30:28 CH0_FIFO_DEPTH
27:25 CH0_SMS
24:22 CH0_LMS
21:19 CH0_DMS
18:16 CH0_MAX_MULT_SIZE
15:14 CH0_FC
13 CH0_HC_LLP
12 CH0_CTL_WB_EN
11 CH0_MULTI_BLK_EN
User Manual
0x7 = LLP_RELOAD
0x8 = LLP_LLP
N/A Reserved
R The value of this register is derived from the DMAH_CH0_FIFO_DEPTH coreConsultant
parameter.
0x0 = 8
0x1 = 16
0x2 = 32
0x3 = 64
0x4 = 128
R The value of this register is derived from the DMAH_CH0_SMS coreConsultant
parameter.
0x0 = MASTER_1
0x1 = MASTER_2
0x2 = MASTER_3
0x3 = MASTER_4
0x4 = NO_HARDCODE
R The value of this register is derived from the DMAH_CH0_LMS coreConsultant
parameter.
0x0 = MASTER_1
0x1 = MASTER_2
0x2 = MASTER_3
0x3 = MASTER_4
0x4 = NO_HARDCODE
R The value of this register is derived from the DMAH_CH0_DMS coreConsultant
parameter.
0x0 = MASTER_1
0x1 = MASTER_2
0x2 = MASTER_3
0x3 = MASTER_4
0x4 = NO_HARDCODE
R The value of this register is derived from the DMAH_CH0_MULT_SIZE coreConsultant
parameter.
0x0 = 4
0x1 = 8
0x2 = 16
0x3 = 32
0x4 = 64
0x5 = 128
0x6 = 256
0x7 = reserved
R The value of this register is derived from the DMAH_CH0_FC coreConsultant parameter.
0x0 = DMA
0x1 = SRC
0x2 = DST
0x3 = ANY
R The value of this register is derived from the DMAH_CH0_HC_LLP coreConsultant
parameter.
0x0 = FALSE
0x1 = TRUE
R The value of this register is derived from the DMAH_CH0_CTL_WB_EN coreConsultant
parameter.
0x0 = FALSE
0x1 = TRUE
R The value of this register is derived from the DMAH_CH0_MULT_BLK_EN coreConsultant
parameter.
0x0 = FALSE
0x1 = TRUE
All information provided in this document is subject to legal disclaimers.
167
Direct Memory Access Controller (DMAC)
© REALTEK 2019. All rights reserved.