Realtek Ameba-D RTL872 D Series User Manual page 224

25 OC9PE
24 CC9E
23:16 RSVD
15:0 CCR9
10.4.3.19 TIMx Capture/Compare Register 10 (TIMx_CCR10)

Name: TIM5 capture/compare register 10

Address offset: 0x48

Reset value: 0x00000000

Read/write access: read/write
31 30 29 28
RSVD
15 14 13 12
Bit Name
31:28 RSVD
27 CC10M
26 CC10P
25 OC10PE
24 CC10E
23:16 RSVD
15:0 CCR10
10.4.3.20 TIMx Capture/Compare Register 11 (TIMx_CCR11)

Name: TIM5 capture/compare register 11

Address offset: 0x4C

Reset value: 0x00000000

Read/write access: read/write
31 30 29 28
RSVD
15 14 13 12
Bit Name
31:28 RSVD
27 CC11M
26 CC11P
25 OC11PE
24 CC11E
23:16 RSVD
15:0 CCR11
10.4.3.21 TIMx Capture/Compare Register 12 (TIMx_CCR12)

Name: TIM5 capture/compare register 12

Address offset: 0x50
User Manual
R/W 0 Refer to OC0PE description in TIMx_CCR0
R/W 0 Refer to CC0E description in TIMx_CCR0
N/A - Reserved
R/W 0 Refer to CCR0 description in TIMx_CCR0
27 26 25
CC10M CC10P OC10PE
R/W R/W R/W
11 10 9
Access Reset Description
N/A - Reserved
R/W 0 Refer to CC0M description in TIMx_CCR0
R/W 0 Refer to CC0P description in TIMx_CCR0
R/W 0 Refer to OC0PE description in TIMx_CCR0
R/W 0 Refer to CC0E description in TIMx_CCR0
N/A - Reserved
R/W 0 Refer to CCR0 description in TIMx_CCR0
27 26 25
CC11M CC11P OC11PE
R/W R/W R/W
11 10 9
Access Reset Description
N/A - Reserved
R/W 0 Refer to CC0M description in TIMx_CCR0
R/W 0 Refer to CC0P description in TIMx_CCR0
R/W 0 Refer to OC0PE description in TIMx_CCR0
R/W 0 Refer to CC0E description in TIMx_CCR0
N/A - Reserved
R/W 0 Refer to CCR0 description in TIMx_CCR0
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24 23 22 21
CC10E
R/W
8 7 6 5
CCR10
R/W
24 23 22 21
CC11E
R/W
8 7 6 5
CCR11
R/W
224
Ameba-D User Manual
20 19 18 17
RSVD
4 3 2 1
20 19 18 17
RSVD
4 3 2 1
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