Realtek Ameba-D RTL872 D Series User Manual page 159

9 CH6_SRC_GAT_EN
8 CH6_DST_SCA_EN
7 CH6_STAT_SRC
6 CH6_STAT_DST
5:3 CH6_STW
2:0 CH6_DTW
9.3.2.4.5 DMA_COMP_PA RAMS_4

Name: DMAC Component Parameters Register 4

Size: 64 bits

Address offset: 0x3d8

Read/write access: read
This is a constant read-only register that contains encoded information about the component parameter settings for Channel 3 and Channel 4.
The reset value depends on coreConsultant parameter(s).
Note: If DMAH_RETURN_ERR_RESP is set to True, the DMAC returns an ERROR response to an illegal register access, which includes accessing
registers that have been removed during DMAC configuration. If DMAH_RETURN_ERR_RESP is set to False, DMAC always returns an OK
response.
Bits 63:32 include the configuration parameters for Channel 3. Bits 31:0 include configuration parameters for Channel 4.
Bit Name
63 RSVD
62:60 CH3_FIFO_DEPTH
User Manual
R The value of this register is derived from the DMAH_CH6_SRC_GAT_EN coreConsultant
parameter.
0x0 = FALSE
0x1 = TRUE
R The value of this register is derived from the DMAH_CH6_DST_SCA_EN coreConsultant
parameter.
0x0 = FALSE
0x1 = TRUE
R The value of this register is derived from the DMAH_CH6_STAT_SRC coreConsultant
parameter.
0x0 = FALSE
0x1 = TRUE
R The value of this register is derived from the DMAH_CH6_STAT_DST coreConsultant
parameter.
0x0 = FALSE
0x1 = TRUE
R The value of this register is derived from the DMAH_CH6_STW coreConsultant parameter.
0x0 = NO_HARDCODE
0x1 = 8
0x2 = 16
0x3 = 32
0x4 = 64
0x5 = 128
0x6 = 256
0x7 = reserved
R The value of this register is derived from the DMAH_CH6_DTW coreConsultant parameter.
0x0 = NO_HARDCODE
0x1 = 8
0x2 = 16
0x3 = 32
0x4 = 64
0x5 = 128
0x6 = 256
0x7 = reserved
Access Description
N/A Reserved
R The value of this register is derived from the DMAH_CH3_FIFO_DEPTH coreConsultant
parameter.
0x0 = 8
0x1 = 16
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159
Direct Memory Access Controller (DMAC)
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