Realtek Ameba-D RTL872 D Series User Manual page 156

31:0 RSVD
9.3.2.4.4 DMA_COMP_PA RAMS_5

Name: DMAC Component Parameters Register 5

Size: 64 bits

Address offset: 0x3d0

Read/write access: read
This is a constant read-only register that contains encoded information about the component parameter settings for Channel 5 and Channel 6.
The reset value depends on coreConsultant parameter(s).
Note: If DMAH_RETURN_ERR_RESP is set to True, the DMAC returns an ERROR response to an illegal register access, which includes accessing
registers that have been removed during DMAC configuration. If DMAH_RETURN_ERR_RESP is set to False, DMAC always returns an OK
response.
Bits 63:32 include the configuration parameters for Channel 5. Bits 31:0 include configuration parameters for Channel 6.
Bit Name
63 RSVD
62:60 CH5_FIFO_DEPTH
59:57 CH5_SMS
56:54 CH5_LMS
53:51 CH5_DMS
50:48 CH5_MAX_MULT_SIZE
User Manual
0x4 = 64
0x5 = 128
0x6 = 256
0x7 = reserved
N/A Reserved
Access Description
N/A Reserved
R The value of this register is derived from the DMAH_CH5_FIFO_DEPTH coreConsultant
parameter.
0x0 = 8
0x1 = 16
0x2 = 32
0x3 = 64
0x4 = 128
R The value of this register is derived from the DMAH_CH5_SMS coreConsultant parameter.
0x0 = MASTER_1
0x1 = MASTER_2
0x2 = MASTER_3
0x3 = MASTER_4
0x4 = NO_HARDCODE
R The value of this register is derived from the DMAH_CH5_LMS coreConsultant parameter.
0x0 = MASTER_1
0x1 = MASTER_2
0x2 = MASTER_3
0x3 = MASTER_4
0x4 = NO_HARDCODE
R The value of this register is derived from the DMAH_CH5_DMS coreConsultant parameter.
0x0 = MASTER_1
0x1 = MASTER_2
0x2 = MASTER_3
0x3 = MASTER_4
0x4 = NO_HARDCODE
R The value of this register is derived from the DMAH_CH5_MULT_SIZE coreConsultant
parameter.
0x0 = 4
0x1 = 8
0x2 = 16
0x3 = 32
0x4 = 64
0x5 = 128
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Ameba-D User Manual
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