21.1
Overall Description ........................................................................................................................................................ 453
21.1.1
Introduction ................................................................................................................................................................ 453
21.1.2
Features ...................................................................................................................................................................... 453
21.1.3
Application Scenario ................................................................................................................................................... 453
21.2
Architecture ................................................................................................................................................................... 454
21.2.1
Q-Decoder Block Diagram .......................................................................................................................................... 454
21.2.2
Position Measurement ............................................................................................................................................... 455
21.2.3
Velocity Measurement................................................................................................................................................ 459
21.3
Registers ......................................................................................................................................................................... 460
21.3.1
Global Control Registers ............................................................................................................................................. 460
21.3.2
Position Measurement Registers ................................................................................................................................ 463
21.3.3
Velocity Measurement Registers ................................................................................................................................ 465
21.3.4
Interrupt Registers ...................................................................................................................................................... 468
2
22
S) ........................................................................................................................................................ 472
22.1
Introduction ................................................................................................................................................................... 472
22.2
Features ......................................................................................................................................................................... 472
22.3
Interface ......................................................................................................................................................................... 472
22.4
Functional Description ................................................................................................................................................... 473
22.4.1
Signal Lines ................................................................................................................................................................. 473
22.4.2
Operation Mode ......................................................................................................................................................... 474
22.4.3
Serial Data Standard................................................................................................................................................... 475
22.4.4
Clock Type ................................................................................................................................................................... 476
22.4.5
Memory Block ............................................................................................................................................................. 478
22.4.6
FIFO Allocation ........................................................................................................................................................... 478
22.5
Registers ......................................................................................................................................................................... 482
22.5.1
Control Register (IS_CTL) ............................................................................................................................................ 483
22.5.2
22.5.3
22.5.4
22.5.5
22.5.6
22.5.7
22.5.8
22.5.9
22.5.10
22.5.11
Version ID (IS_VERSION_ID) .................................................................................................................................... 489
Abbreviations .......................................................................................................................................................................... 490
Revision History....................................................................................................................................................................... 494
User Manual
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Contents
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