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ST STM32F7 Series Manuals
Manuals and User Guides for ST STM32F7 Series. We have
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ST STM32F7 Series manuals available for free PDF download: Application Note, Application Notes
ST STM32F7 Series Application Notes (54 pages)
Brand:
ST
| Category:
Microcontrollers
| Size: 1 MB
Table of Contents
Table of Contents
2
Power Supplies
7
Introduction
7
Independent A/D Converter Supply and Reference Voltage
7
Independent USB Transceivers Supply
7
Figure 1. VDDUSB Connected to VDD Power Supply
8
Figure 2. VDDUSB Connected to External Power Supply
8
Independent SDMMC2 Supply for Stm32F767Xx/Stm32F777Xx and Stm32F72Xxx/Stm32F73Xxx Devices
9
Independent DSI Supply for Stm32F769Xx/Stm32F779Xx Devices
10
Battery Backup Domain
10
Voltage Regulator
10
Power Supply Scheme
11
Figure 4. Power Supply Overview (Stm32F74Xxx/Stm32F75Xxx)
12
Figure 5. Stm32F769Xx/Stm32F779Xx Power Supply Scheme
13
Reset & Power Supply Supervisor
17
Power-On Reset (Por)/Power-Down Reset (PDR)
17
Programmable Voltage Detector (PVD)
17
Figure 9. Power on Reset/Power down Reset Waveform
17
System Reset
18
Figure 10. PVD Threshold
18
Internal Reset on
19
Internal Reset off
19
Figure 11. Reset Circuit
19
Figure 13. NRST Circuitry Timing Example
20
Regulator off Mode
21
Regulator ON/OFF and Internal Reset ON/OFF Availability
22
Table 1. Regulator ON/OFF and Internal Reset ON/OFF Availability
22
Alternate Function Mapping to Pins
23
Figure 15. Stm32Cubemx Example Screen-Shot
23
Clocks
24
HSE OSC Clock
24
External User Clock (HSE Bypass)
24
Figure 16. HSE External Clock
24
Figure 17. HSE Crystal/Ceramic Resonators
24
External Crystal/Ceramic Resonator (HSE Crystal)
25
LSE OSC Clock
25
Figure 18. LSE External Clock
25
Figure 19. LSE Crystal/Ceramic Resonators
25
External Clock (LSE Bypass)
26
External Crystal/Ceramic Resonator (LSE Crystal)
26
Clock Security System (CSS)
26
Boot Configuration
27
Boot Mode Selection
27
Table 2. Boot Modes
27
Boot Pin Connection
28
System Bootloader Mode
28
Table 3. STM32F7 Series Bootloader Communication Peripherals
28
Figure 20. Boot Mode Selection Implementation Example
28
Debug Management
29
Introduction
29
SWJ Debug Port (Serial Wire and JTAG)
29
Figure 21. Host to Board Connection
29
Pinout and Debug Port Pins
30
SWJ Debug Port Pins
30
Flexible SWJ-DP Pin Assignment
30
Table 4. SWJ Debug Port Pins
30
Internal Pull-Up and Pull-Down on JTAG Pins
31
Table 5. Flexible SWJ-DP Assignment
31
SWJ Debug Port Connection with Standard JTAG Connector
32
Figure 22. JTAG Connector Implementation
32
Recommendations
33
Printed Circuit Board
33
Component Position
33
Ground and Power Supply (VSS,VDD)
33
Decoupling
33
Other Signals
34
Unused I/Os and Features
34
Figure 23. Typical Layout for VDD/VSS Pair
34
Recommendations for the WLCSP180 Package in the Stm32F769Ax/Stm32F768Ax Devices
35
Reference Design
36
Description
36
Clocks
36
Reset
36
Boot Mode
36
SWJ Interface
36
Power Supply
36
Component References
37
Table 6. Mandatory Components
37
Table 7. Optional Components
37
Figure 24. STM32F756NGH6 Reference Schematic
38
Table 8. Reference Connection for All Packages
39
Recommended PCB Routing Guidelines for STM32F7 Series Devices
42
PCB Stack-Up
42
Figure 25. Four Layer PCB Stack-Up Example
42
Crystal Oscillator
43
Power Supply Decoupling
43
Figure 26. Six Layer PCB Stack-Up Example
43
High Speed Signal Layout
44
SDMMC Bus Interface
44
Figure 27. Example of Bypass Cap Placed Underneath the STM32F7 Series
44
Flexible Memory Controller (FMC) Interface
45
Quadrature Serial Parallel Interface (Quad-SPI)
46
Embedded Trace Macrocell (ETM)
47
Package Layout Recommendation
47
BGA 216 0.8 MM Pitch Design Example
47
Table 9. BGA 216 0.8 MM Pitch Package Information
47
Figure 28. BGA 0.8Mm Pitch Example of Fan-Out
48
Figure 29. Via Fan-Out
48
Figure 30. FMC Signal Fan-Out Routing Example
48
WLCSP143 0.4 MM Pitch Design Example
49
Table 10. Wafer Level Chip Scale Package Information
49
Figure 31. 143-Bumps WLCSP, 0.40 MM Pitch Routing Example
50
Conclusion
51
Revision History
52
Table 11. Document Revision History
52
Figure 6. Stm32F767Xx/Stm32F777Xx Power Supply Scheme
52
Figure 12. Power Supply Supervisor Interconnection with Internal Reset off
52
Figure 14. BYPASS_REG Supervisor Reset Connection
52
Figure 3. VDDSDMMC Connected to External Power Supply
53
Figure 7. Stm32F7X2Xx Power Supply Scheme
53
Figure 8. Stm32F7X3Xx Power Supply Scheme
53
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ST STM32F7 Series Application Note (56 pages)
Brand:
ST
| Category:
Microcontrollers
| Size: 3 MB
Table of Contents
General Information
2
Table 2. Glossary
2
Overview
5
Security Purpose
5
Figure 1. Corrupted Connected Device Threat
5
Table 3. Assets to be Protected
6
Attack Types
7
Introduction to Attack Types
7
Software Attacks
8
Table 4. Attacks Types and Costs
8
Hardware Attacks
9
Non-Invasive Attacks
10
Silicon Invasive Attacks
11
Iot System Attack Examples
12
Figure 2. Iot System
12
List of Attack Targets
13
Device Protections
16
Configuration Protection
16
Trustzone ® for Armv8-M Architecture
16
Dual-Core Architecture
17
Figure 3. Armv8-M Trustzone® Execution Modes
17
Figure 4. Simplified Diagram of Dual-Core System Architecture
17
Memory Protections
18
Figure 5. Memory Types
18
System Flash Memory
19
User Flash Memory
19
Embedded SRAM
19
External Flash Memories
20
STM32 Memory Protections
21
Software Isolation
21
Debug Port and Other Interface Protection
21
Boot Protection
22
System Monitoring
22
Secure Applications
23
Secure Firmware Install (SFI)
23
Root and Chain of Trust
23
Stmicroelectronics Proprietary SBSFU Solution
23
Secure Boot (SB)
23
Secure Firmware Update (SFU)
24
Figure 6. Secure Boot FSM
24
Configurations
25
Arm TF-M Solution
25
Figure 7. Secure Server/Device SFU Architecture
25
Product Certifications
26
Table 8. Basic Feature Differences of Trustzone-Based Secure Software
26
STM32 Security Features
27
Overview of Security Features
27
Static and Dynamic Protections
27
Security Features by STM32 Devices
27
Table 10. Security Features for STM32L0/1/4/4+, STM32WB, STM32WL Devices
28
Readout Protection (RDP)
29
Table 11. Security Features for STM32L5, STM32U5, STM32H503/5, Stm32H72X/73/74X/75, Stm32H7Ax/7Bx, STM32F7 Devices
29
Figure 8. Example of RDP Protections (STM32L4 Series)
30
Lifecycle Management-Product State
31
Table 12. RDP Protections
31
One-Time Programmable (OTP)
32
Trustzone
32
Core State
33
Secure Attribution Unit (SAU)
33
Figure 9. Trustzone® Implementation at System Level
33
Memory and Peripheral Protections
34
Flash Memory Write Protection (WRP)
34
Execute-Only Firmware (PCROP)
34
Secure Hide Protection (HDP)
35
Firewall
35
Figure 10. HDP Protected Firmware Access
35
Figure 11. Firewall FSM
36
Figure 12. Firewall Application Example
36
Memory Protection Unit (MPU)
37
Table 13. Attributes and Access Permission Managed by MPU
37
Customer Key Storage (CKS)
38
Table 14. Process Isolation
38
Figure 13. Dual-Core Architecture with CKS Service
38
Antitamper (Tamp)/Backup Registers (BKP)
39
Clock Security System (CSS)
39
Power Monitoring (PVD)
39
Memory Integrity Hardware Check
39
Independent Watchdog (IWDG)
40
Device ID
40
Cryptography
40
Hardware Accelerators
40
Cryptolib Software Library
40
On-The-Fly Decryption Engine (OTFDEC)
41
Figure 14. Typical OTFDEC Configuration
41
Guidelines
42
Table 15. Security Use Cases
42
Conclusion
44
Appendix A Cryptography - Main Concepts
45
Secret Key Algorithms
45
Figure 15. Symmetric Cryptography
45
Public Key Algorithms (PKA)
46
Figure 16. Signature
46
Figure 17. PKA Encryption
46
Hash Algorithms
47
MAC or Signature and Certificate
47
Figure 18. Message Hashing
47
Figure 19. MAC Generation with Secrete Key Algorithm
47
Figure 20. Signature Generation with Public Key Algorithm
48
Revision History
49
Table 1. Applicable Products
49
Table 16. Document Revision History
49
Table 5. Memory Types and Associated Protection
50
Table 6. Scope of STM32 Embedded Memory Protection Features
50
Table 7. Software Isolation Mechanism
50
Table 9. Security Features for STM32C0, STM32F0/1/2/3/4, STM32G0/4 Devices
50
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