Understanding And Troubleshooting Configuration Pin Behavior - Intel Agilex Configuration User Manual

6. Intel Agilex Debugging Guide
UG-20205 | 2019.10.09
Here are some examples of
#Global QSF assignment
set_global_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON
#Per-pin QSF assignment
set_instance_assignment -name PRESERVE_UNUSED_XCVR_CHANNEL ON -to AA75
Related Information
Unused Transceiver Channels
For more detailed information about preserving unused transceiver channels in E-tile devices.

6.7. Understanding and Troubleshooting Configuration Pin Behavior

Configuration typically fails for one of the following reasons:
• The host times outs
• A configuration data error occurs
• An external event interrupts configuration
• An internal error occurs
Here are some very common causes of configuration failures:
•
Check
OSC_CLK_1
clock source on your board.
• Ensure a free running reference clock is present for designs using transceivers, PCIe, or HBM2. These reference clocks
must be available until the device enters user mode.
• For designs using the HPS and the external memory interface (EMIF), ensure that the EMIF clock is present.
• For designs using SmartVID (-V and -E devices), ensure that this feature is set-up and operating correctly. Ensure that
the voltage regulator supports SmartVID.
Here are some debugging suggestions that apply to any configuration mode:
•
To rule out issues with
• Try configuring the Intel Agilex device with a simple design that does not contain any IP. If configuration via a non-JTAG
scheme fails with a simple design, try JTAG configuration with the
Send Feedback
PRESERVE_UNUSED_XCVR_CHANNEL
frequency. It must match the frequency you specified in the Intel Quartus Prime Software and the
select the Internal Oscillator option in the Intel Quartus Prime.
OSC_CLK_1
QSF assignments.
pins set specifically to JTAG.
MSEL
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