Related Information
AS Configuration Timing in Intel Agilex Devices
For timing parameter minimum, typical, and maximum values.
3.2.1. AS Configuration Scheme Hardware Components and File Types
You use the following components to implement the AS configuration scheme:
•
Quad SPI flash memory
•
The Intel FPGA Download Cable II to connect the Intel Quartus Prime Programmer to the PCB.
The following block diagram illustrates the components and design flow using the AS configuration scheme.
Figure 34.
Components and Design Flow for .jic Programming
Intel
®
Agilex
™
Configuration User Guide
88
Quartus Software flow on PC
Quartus Prime
Compilation
Quartus Prime:
File
Start Compile
SOF
Quartus Prime
Programming File
JIC
Generator
Quartus Prime:
File Programming File Generator
3. Intel Agilex Configuration Schemes
Board
Intel FPGA
QSPI
Flash
SDM
10 pin JTAG header
Intel FPGA Download Cable II
USB
Quartus Prime
Programmer
Quartus Prime:
Tools
Programming
UG-20205 | 2019.10.09
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