Intel Agilex Debugging Guide - Intel Agilex Configuration User Manual

UG-20205 | 2019.10.09
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6. Intel Agilex Debugging Guide

6.1. Configuration Debugging Checklist
Work through this checklist to identify issues that may result in operational failures.
Table 46. General Configuration Debugging Checklist
1 Verify that the V
2 Verify that all configuration resistors are correctly connected (
3 Verify that you are following the correct power-up and power-down sequences.
4 Verify that the SDM I/Os assignments are correct by checking the Intel Quartus Prime Compilation QSF and Fitter reports.
5
For SmartVID devices (-V or -E), ensure that all
6 Verify that SmartVID settings follow the recommendations in the Intel Agilex Power Management User Guide
7 Verify that the Intel Agilex -V or -E device has its own voltage regulator module for V
8
After configuration are the
these levels.
9 Is the SDM operating Boot ROM code or configuration firmware?
Use the SDM Debug Toolkit to answer this question.
10
Are the
MSEL
Use the SDM Debug Toolkit to answer this question.
11 For designs that use transceivers, HBM2, PCIe, or EMIF, are the reference clocks stable and free running before configuration
begins?
12 Does your design include the Reset Release IP?
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,V ,V V ,V , V
cc ccp ccio_sdm ccpt cceram ccadc
PMBus
,
nCONFIG nSTATUS CONF_DONE
pins correctly connected on board?
Checklist Item
supplies are in the proper range by using SDM Debug Toolkit.
, , ,
MSEL nCONFIG nSTATUS CONF_DONE
pins are connected to Intel Agilex device.
, V
CC CCP
, and pins high? Use the SDM Debug Toolkit to determine
INIT_DONE
, ).
INIT_DONE
, V , and V
CCL_HPS CCPLLDIG_HPS
Complete?
continued...
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