Intel Agilex Configuration User Manual page 22

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Configuration Error
A low pulse on the
Errors require reconfiguration.
After a low pulse indicating an error, configuration stops. The
Following an error, the SDM drives
The device enters Idle state after the
User Mode
The SDM drives the
impedance state. The device enters user mode. The entire device does not enter user mode simultaneously. Intel requires
you to include the Reset Release in your design. Use the
your application logic in the reset state until the entire FPGA fabric is in user mode. Failure to include this IP in your
design may result in intermittent application logic failures.
The
nCONFIG
You may re-configure the device by driving
Device Clean
In the Device Clean state the design stops functioning.
Device cleaning zeros out all configuration data.
The Intel Agilex device drives
The SDM drives the
JTAG Configuration
Note:
You can perform JTAG configuration anytime from any state except the power-on and SDM startup state. The Intel Agilex
device cancels the previous configuration and accepts the reconfiguration data from the JTAG interface. The
must be held in a stable state during JTAG configuration. A falling edge on the
Note:
The SDM only samples the
configuration scheme you specified at power-on.
Intel
®
Agilex
Configuration User Guide
22
pin indicates a configuration error.
nSTATUS
nSTATUS
nSTATUS
pin high after initializing internal registers and releases GPIO pins from the high
INIT_DONE
pin should remain high in user mode.
nCONFIG
and
CONF_DONE
pin low when device cleaning completes.
nSTATUS
pins at power-on. The SDM drives
MSEL
pin remains high.
nSTATUS
low after the external host drives
pin recovers to initial pre-configuration low state.
output of the Reset Release Intel FPGA IP to hold
nINIT_DONE
pin from low to high.
low.
INIT_DONE
nCONFIG
high to initiate bitstream configuration using the
nCONFIG
2. Intel Agilex Configuration Details
UG-20205 | 2019.10.09
low.
nCONFIG
nCONFIG
signal cancels the JTAG configuration.
signal
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