Intel Agilex Configuration User Manual page 83

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3. Intel Agilex Configuration Schemes
UG-20205 | 2019.10.09
Options
What is the byte
Provide the byte address of the option bits.
address of the option
bits, in hex?
Which FPGA
Avalon-ST x8
configuration scheme
Avalon-ST x16
will be used?
Avalon-ST x32
What should occur on
Halt
configuration failure?
Retry same page
Retry from fixed address
What is the byte
address to retry from
failure
Include input to force
On
reconfiguration
Off
Enable watchdog
On
timer on Remote
Off
System Update
support
Send Feedback
Value
Specifies the option bits start address in flash memory. The start address must reside on
an 8 KB boundary. This address must be the same as the bit sector address you specified
when converting the
For more information refer to Storing Option Bits.
Specifies the width of the Avalon-ST interface.
Configuration behavior after configuration failure.
If you select Halt, the FPGA configuration stops completely after failure.
If you select Retry same page, after failure, the PFL II IP core reconfigures the FPGA
with data from the page that failed.
If you select Retry from fixed address, the PFL II IP core reconfigures the FPGA a
fixed address.
If you select Retry from fixed address for configuration failure option, this option
specifies the flash address the PFL II IP core to reads from.
Includes the optional
reconfiguration of the FPGA.
Enables a watchdog timer for remote system update support. Turning on this option
enables the
This option also specifies the period before the watchdog timer times out. The watchdog
timer runs at the
Description
to a
.
.sof
.pof
reconfiguration input pin to enable
pfl_nreconfigure
input pin and
pfl_reset_watchdog
pfl_watchdog_error
.
pfl_clk frequency
output pin.
continued...
Intel
®
Agilex
Configuration User Guide
83

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