Understanding Seus - Intel Agilex Configuration User Manual

6.4. Understanding SEUs

SEUs are rare, unintended changes in the state of an FPGA's internal memory elements caused by cosmic radiation effects.
The change in state is a soft error and the FPGA incurs no permanent damage. Because of the unintended memory state, the
FPGA may operate erroneously until background scrubbing fixes the upset.
The Intel Quartus Prime software offers several features to detect and correct the effects of SEU, or soft errors, and to
characterize the effects of SEU on your designs. LSM firmware provides SEU single bit error correction and multi-bit error
detection per LSM. Additionally, some Intel FPGAs contain dedicated circuitry to help detect and correct errors.
For more information about SEUs, refer to Intel Agilex SEU Mitigation User Guide.
6.5. Reading the Unique 64-Bit CHIP ID
he Chip ID Intel FPGA IP in each Intel Agilex device stores a unique 64-bit chip ID. Refer to the Mailbox Avalon ST Client IP
User Guide learn how to read the Chip ID from the Intel Agilex device.
6.6. E-Tile Transceivers May Fail To Configure
Making the
PRESERVE_UNUSED_XCVR_CHANNEL
failures in Intel Agilex devices.
The Intel Quartus Prime Programmer detects an internal error and fails to configure your device under the following
conditions:
•
You have made the
• Your design does not provide a reference clock to this unused E-tile.
The reference clock is necessary to generate a pseudo-random data signal to prevent the transceiver from degrading over
time. You must instantiate at least one dummy channel in the E-tile using the Native PHY IP GUI. Provide this channel at least
one reference clock. All preserved channels in a single E-tile can use the same reference clock.
When your design uses some channels in an E-tile, you can use the per-pin
assignment to preserve only the channels in the E-tile that you intend to use. If you never intend to use a channel, you
should not add the per-pin
Intel ® Agilex ™ Configuration User Guide
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assignment to completely unused E-tile transceivers may cause configuration
PRESERVE_UNUSED_XCVR_CHANNEL
PRESERVE_UNUSED_XCVR_CHANNEL
assignment to an entire unused E-tile.
PRESERVE_UNUSED_XCVR_CHANNEL
QSF assignment.
6. Intel Agilex Debugging Guide
UG-20205 | 2019.10.09
QSF
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