2. Intel Agilex Configuration Details
UG-20205 | 2019.10.09
SDM Pins
SDM_IO14
SDM_IO15
SDM_IO16
2.5.2. MSEL Settings
After power-on
MSEL[2:0]
pins up to V
MSEL[2:0]
Figure 8.
MSEL Pull-Up and Pull-Down Circuit Diagram
Table 4.
MSEL Settings for Each Configuration Scheme of Intel Agilex Devices
Avalon-ST (x32)
Avalon-ST (x16)
Avalon-ST (x8)
(2)
AS (Fast mode – for CvP)
(2)
If you use AS Fast mode and are not concerned about 100 ms PCIe linkup, you must still ramp the
This ramp-up requirement ensures that the AS x4 device is within its operating voltage range when the Intel Agilex device begins to
access it.
Send Feedback
MSEL Function
—
—
—
pins specify the configuration scheme for Intel Agilex devices. Use 4.7-kΩ resistors to pull the
or down to ground as required by the
CCIO_SDM
V
CCIO_SDM
R
4.7kΩ
UP
MSEL[0]
Configuration Scheme
Configuration Source Function
Avalon-ST x8
AVSTx8_CLK
AVSTx8_DATA6
—
setting for your configuration scheme.
MSEL[2:0]
MSEL[0]
OR
R
4.7kΩ
DN
V
AS x4
—
—
—
MSEL[2:0]
000
101
110
001
continued...
supply within 18 ms.
CCIO_SDM
Intel
®
Agilex
™
Configuration User Guide
27