Intel Agilex Configuration User Manual page 107

3. Intel Agilex Configuration Schemes
UG-20205 | 2019.10.09
The AS configuration scheme operation is like earlier device families. However, there is one significant difference. Intel Agilex
devices using AS mode, try to load a firmware section from addresses 0, 512, 1024 and 1536 in the serial flash device
connected to the CS0 pin.
If the configuration bitstream does not include a valid image, the SDM asserts an error by driving
recover from the error by reconfiguring the FPGA over JTAG, or by driving
SDM tristates AS pins,
to JTAG. If
MSEL
Unlike earlier device families, the AS pins are not tristated when the device enters user mode.
The AS configuration scheme has power-on requirements. If you use AS Fast mode and are not concerned about 100 ms PCIe
link training requirement, you must still ramp the V
AS x4 device is within its operating voltage range when the Intel Agilex device begins assessing the AS x4 device.
When using AS fast mode, all power supplies to the Intel Agilex device must be fully ramped-up to the recommended
operating conditions before the SDM releases from reset. To meet the PCIe 100 ms power-up-to-active time requirement for
CvP, the V
CCIO_SDM
Debugging Suggestions
Here are some debugging tips for the AS configuration scheme:
• Ensure that the boot address for your configuration image is correctly defined when generating the programming file for
the flash. The boot address defaults to 0 for AS configuration.
• Ensure that the design meets the power-supply ramp requirements for fast AS mode. If using fast mode, V
ramp up within 18 ms.
• Ensure that the flash is powered up and ready to be accessed when the Intel Agilex device exits power-on reset.
• If you are using an external clock source for configuration, ensure the
matches the frequency you set for the
•
Ensure the
MSEL
Send Feedback
, -
AS_CLK AS_DATA0 AS_DATA3
is either AS fast or normal, the SDM drives the AS pins until you power cycle the Intel Agilex device.
MSEL
power to the Intel Agilex device must be at the recommended operating range within 10 ms.
OSC_CLK_1
pins reflect the correct AS configuration scheme.
nCONFIG
, and - , only when the device powers on if you set
AS_nCS0 AS_nCS3
supply within 18 ms. This ramp-up requirement ensures that the
CCIO_SDM
OSC_CLK_1
in your Intel Quartus Prime Pro Edition project.
low. You can
nSTATUS
low.
CCIO_SDM
pin is fed correctly, and the frequency
Intel ® Agilex ™ Configuration User Guide
must
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