Agilent Technologies ESA-E Series Programmer's Manual page 41

Status Registers
Use Status Registers to Determine the State of Analyzer Events and Conditions
The status byte register contains the following bits:
Figure 2-5
Bit Number
Bit
0, 1 These bits are always set to 0.
2 A 1 in this bit position indicates that the SCPI error queue is not empty. The SCPI error
queue contains at least one error message.
3 A 1 in this bit position indicates that the questionable status summary bit has been set.
The questionable status event register can then be read to determine the specific
condition that caused this bit to be set.
4 A 1 in this bit position indicates that the analyzer has data ready in the output queue.
There are no lower status groups that provide input to this bit.
5 A 1 in this bit position indicates that the standard event status summary bit has been
set. The standard event status register can then be read to determine the specific event
that caused this bit to be set.
6 A 1 in this bit position indicates that the analyzer has at least one reason to report a
status change. This bit is also called the master summary status bit (MSS).
7 A 1 in this bit position indicates that the operation status summary bit has been set. The
operation status event register can then be read to determine the specific event that
caused this bit to be set.
To query the status byte register, send the *STB command. The
response will be the decimal sum of the bits that are set to 1. For
example, if bit number 7 and bit number 3 are set to 1, the decimal sum
of the 2 bits is 128 plus 8. So the decimal value 136 is returned.
2-12
7 6 5 4
*STB?
Status Byte Register
Description
3 2 1 0
ck764a
Chapter 2