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31
30
IOPDS
0
0
0
0
15
0
0
0
0
The
Test Base Address Register
Diagnostic Memory (Memory 1) access.
TBAddr
Test Base Address (Read/Write)
Significant bits determined by the size of Diagnostic
Memory (programmed using serial EPROM).
R
Reserved
Reserved for future use.
Register: 0x030
Host Interrupt Status Register
Read Only
0
0
0
R
0
0
0
The
Host Interrupt Status Register
information to the PCI Host. A write of any value to this register clears
the interrupt associated with the System Doorbell.
IOPDS
IOP Doorbell Status (Read Only)
This bit when set to '1' indicates that the IOP has
received a System: IOP Doorbell message but has not
yet processed it (has not cleared the corresponding
SysReq interrupt).
R
Reserved
Reserved for future use.
RI
Reply Interrupt (Read Only)
Reply Interrupt – set to '1' when:
–
Std reply option – whenever the ReplyPostFIFO is not
empty.
–
Alt reply option – whenever the
not equal to the ReplyPostWrPtr register.
Host Interface Registers
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
is used to specify the base address for
R
0
0
0
0
0
0
0
0
provides read only interrupt status
[31:16]
0
0
0
0
4
3
2
1
RI
R
0
0
0
0
Host Index Register
[15:0]
16
0
0
DI
0
31
[30:4]
3
is
5-29
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