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1.1.2 FC Features
1-2
•
Integrated BER link testing
•
32-bit ARM RISC processor
•
Intelligent high-performance context management
•
Synchronous SRAM external memory interface
•
Full simultaneous target and initiator operations
•
Implements common Message Passing Interface (MPI)
•
Failover
•
Load Balancing
•
Firmware supports up to 2000 concurrent host commands
•
PC01 compliant
•
PCI 2.2 compliant
•
JTAG debug interface
•
329-pin BGA
Following is a list of Fibre Channel features supported by the LSIFC929.
•
Class 2 support and Class 3 support (with optional confirmed
delivery)
•
BB credit of 3, alternate login of 1 (each channel)
•
FC-PH compliance
•
FC-AL 7.0 compliance
•
FC-FCP, FC-PLDA compliance
•
FC-FLA compliance
•
FCA-IP, IETF-IPFC compliance
•
NL_Port (NL_Port Attach)
•
FL_Port (Public Loop Attach)
•
F_Port (Fabric Attach)
•
N-Port (Point-to-Point)
•
Autonegotiate between 1 Gbit/s and 2Gbit/s link speeds under
firmware control for easy updating
Introduction
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
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