LSI LSIFC929 Technical Manual page 116

6.3 Packaging
Figure 6.14 LSIFC929 Pinout (329-Pin BGA) Top View
1 2
A SWITCH PLLZVSS
B TMS_CHIP IDDTN
PROC_
C TRST/ DRVLS
D TDI TMS_ICE
E RXLOS1 REFCLK
F RXVDD1 RXVSS1
G RX1+ RX1-
H TX1- TX1+
J ODIS1 TXVSS1
K RXVDD0 RXVSS0
L RX0- RX0+
M RXBVDD0 TXBVDD0
N TX0- TX0+
P TXVDD0 TXVSS0
R LIPRESET/ FAULT0/
T BYPASS0/ NC
U INTB/ INTA/
V GNT/ REQ/
W AD[30] AD[29]
Y AD[27] AD[26]
AA AD[25] C_BE[3]/
AB AD[24] AD[23]
AC IDSEL AD[21]
1 2
6-22
The signal locations for the 329 Ball Grid Array (BGA) are illlustrated in
Figure 6.16. Table 6.16 lists the LSIFC929 signals in alphanumeric order
by BGA position. Table 6.17 lists the LSIFC929 signals in
alphanumerically by signal name. Figure 6.17 is the mechanical drawing
of the package for the LSIFC929.
3 4 5
FSELZ[1] GPIO[3] MODE[7]
ZCLK FSELZ[0] GPIO[0]
GPIO[2]
VSSIO PLLZVDD (BLUELED/)
TCK VSSIO GPIO[1]
TDO VSSC
FAULT1/ VDDC
RXBVSS1 VDDIO
RXBVDD1 TXBVDD1
TXBVSS1 TXVDD1
BYPASS1/ VDDIO
RXBVSS0 RTRIM
HOTSWAP
EN/ VSSIO
TXBVSS0 VDDC
RXLOS0 VDDIO
ODIS0 VSSC
RST/ NC
PCI5VREF VDDIO
AD[31] VDDC
AD[28] VSSC
PCI5VREF VSSIO PCI5VREF
VSSIO AD[20] AD[16]
AD[22] AD[18] C_BE[2]/
AD[19] AD[17] FRAME/
3 4 5
Specifications
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
6 7 8
MODE[3] MODE[0] LED[2]/
MODE[4] MODE[1] LED[3]/
MODE[6] MODE[2] LED[4]/
MODE[5] VDDIO VSSC
VSSC VDDIO VDDC
IRDY/ STOP/ PAR
TRDY/ PERR/ C_BE[1]/
DEVSEL/ SERR/ AD[15]
6 7 8
9 10 11
MOD MOD TEST
DEF0[2] DEF1[1] RESET/
MOD
LED[0]/ DEF1[2] SCL
MOD MOD
LED[1]/ DEF0[1] DEF1[0]
MOD
VDDC VDDIO DEF0[0]
VSSIO VSSIO
VSSIO VSSIO
VSSIO VSSIO
VSSIO VSSIO
VSSIO VSSIO
PCI5VREF VDDIO AD[10]
AD[14] AD[11] C_BE[0]/
AD[13] AD[09] AD[06]
AD[12] AD[08] AD[07]
9 10 11
12
ROMSIZE[0]
SDA
ROMSIZE[1]
VSSIO
VSSIO
VSSIO
VSSIO
VSSIO
VSSIO
VSSIO
PCI5VREF
NC
AD[05]
12