LSI LSIFC929 Technical Manual page 79

Dual channel fibre channerl i/o processor
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Prefetch
Type
IOMemSp
Register: 0x020
Mem1 Base Address High
Read/Write
31
0
0
0
0
15
0
0
0
0
Mem1BAddH Mem0 Base Address High (Read/Write)
PCI/Multifunction PCI Configuration Registers
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
Prefetchable Memory Block
With this bit set, there are no side effects to prefetching.
For reads, all bytes can be sent regardless of the state of
the byte enables. For writes, sequential writes can be
combined into a burst.
Location of Memory
With bit 2 = 1 and bit 1 = 0, the user can map this device
anywhere in the 64-bit space.
I/O or Memory Space Indicator (Read Only)
This bit is set to "0" to indicate Memory Space mapping.
Mem1BAddH (Most Significant)
0
0
0
0
Mem1BAddH (Least Significant)
0
0
0
0
Indicates upper 32 bits of the 64-bit memory address
width, and the location of memory required by the device.
This allows the LSIFC929 to be mapped above the
4 Gbytes boundary.
0
0
0
0
0
0
0
0
3
[2:1]
0
16
0
0
0
0
0
0
0
0
0
[31:0]
5-17

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