LSI LSI53C1510 Manuals

Manuals and User Guides for LSI LSI53C1510. We have 1 LSI LSI53C1510 manual available for free PDF download: Technical Manual

LSI LSI53C1510 Technical Manual

LSI LSI53C1510 Technical Manual (198 pages)

I2O-Ready PCI RAID Ultra2 SCSI Controller

Brand: LSI | Category: Controller | Size: 2.14 MB

Table of Contents

Table of Contents
7
Chapter 1 Introduction

15
- LSI53C1510 Block Diagram
  16
- Module Overviews
  17
  - PCI Interface
    17
  - Memory Controller
    17
  - I2O Message Unit
    17
  - ARM7TDMI RISC Processor
    18
  - RAID Parity Assist Engine (PAE)
    18
  - SCSI Cores
    18
- LSI53C1510 Features
  18
  - Features List
    19
- LSI53C1510 Beneﬁts
  19
  - Ultra2 SCSI Beneﬁts
    19
  - Lvdlink™ Beneﬁts
    20
  - Tolerant ® Technology Beneﬁts
    20
  - I2O Beneﬁts
    21
  - PAE Beneﬁts
    21
  - ARM7TDMI RISC Processor Beneﬁts
    22
- LSI53C1510 Beneﬁts Summary
  22
  - PCI Performance
    22
  - SCSI Performance
    22
  - RAID Performance
    23
  - Testability
    23
  - Integration
    24
  - Reliability
    24
- Applications
  25
  - Embedded Motherboard Application
    25
- Typical LSI53C1510 Mainboard Applications
  25
  - Host Adapter Board Application
    26
- Typical LSI53C1510 Host Adapter Board Application
  26
General Description
15
- Block Diagram
  16
Chapter 2 Functional Description

27
- Modes of Operation
  28
  - LSI53C1510 Overview
    29
- LSI53C1510 Block Diagram
  29
  - Conﬁguration and Initialization
    30
  - ROM Size Conﬁgurations
    31
  - I2O Overview
    32
  - I2O Conceptual Overview
    32
  - I2O Beneﬁts
    33
- Example of LSI53C1510 Physical Conﬁgurations
  33
  - The I2O Communications Model
    34
  - Operational Overview
    34
  - System Interface
    34
- Hardware Messaging Unit
  36
- The Host Interface
  37
  - Messages
    37
  - Message Transport
    37
  - Request Message
    38
  - Reply Message
    40
- LSI53C1510 Request Message Transport
  40
- LSI53C1510 Reply Message Transport
  41
- LSI53C1510 Protocol Engine
  42
  - Random Block Storage Class
    42
- Supported Random Block Storage Messages
  43
- Support Components
  44
- Typical Implementations
  44
  - DRAM Memory
    45
  - Flash ROM
    45
  - Serial EEPROM
    45
Chapter 3 Software Description

47
- Management Software Features
  49
- RAID Firmware Features
  49
- Memory Requirements
  54
- SDMS Software
  54
Chapter 4 Signal Descriptions

57
- Signal Groupings
  58
- LSI53C1510 Functional Signal Groupings
  59
- PCI Interface Signals
  60
  - System Signals
    60
  - Address and Data Signals
    61
  - Interface Control Signals
    62
  - Arbitration Signals
    63
  - Interrupt Signals
    63
  - ARM Signal
    64
  - Error Recording Signals
    64
  - Power Management Signal
    64
  - GPIO Interface Signals
    65
- SCSI Interface Signals
  66
- Memory Interface Signals
  71
  - ROM/SRAM Interface Signals
    71
  - SCAN Signals
    72
  - DRAM Interface Signals
    73
- Miscellaneous Interface Signals
  74
  - UART Interface Signals
    74
  - JTAG Interface Signals
    74
  - ARM Debug Interface Signals
    75
  - RAID Interface Signal
    75
  - Power and Ground Signals
    76
Chapter 5 Registers (Nonintelligent Mode)

77
Chapter 6 Registers (Intelligent Mode)

103
- LSI53C1510 Block Diagram in Intelligent Mode
  104
- Programming Models
  105
- Host Interface Registers (Intelligent Mode)
  121
- Shared Memory
  129
- Shared Memory Address Translation
  129
- PCI RAID Software Solutions
  47
  - Pci Raid
    47
  - Symplicity Storage Manager
    48
  - Wind River Systems' Ixworks RTOS
    49
- Pin Type Description
  57
Chapter 7 Specifications

131
Register Summary

181

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