Pci Bus Commands Supported - LSI LSIFC929 Technical Manual

5.2 PCI Bus Commands Supported

5-2
must be "000" (for PCI Function 0) or "001" (for PCI Function 1), or the
LSIFC929 will not respond. According to the PCI specification, AD[10:8]
are used for multifunction devices. The host processor uses the PCI
configuration space to initialize the LSIFC929.
At initialization time, each PCI device is assigned a base address for
memory accesses and I/O accesses. On every access, the LSIFC929
compares its assigned base addresses with the value on the
Address/Data bus during the PCI address phase. A decode of
C_BE[7:0]/ determines which registers and what type of access is to be
performed.
Bus commands indicate to the target the type of transaction the master
is requesting. Bus commands are encoded on the C_BE[3:0]/ lines
during the address phase. PCI bus command encoding and types appear
in Table 5.1.
The Memory Read, Memory Read Multiple, and Memory Read Line
commands are used to read data from an agent mapped in memory
address space. All 64 address bits are decoded (DAC).
The Memory Write, and Memory Write and Invalidate commands are
used to write data to an agent when mapped in memory address space.
All 64 address bits are decoded (DAC).
Registers
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