LSI LSIFC929 Technical Manual page 77

Dual channel fibre channerl i/o processor
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IOBAdd
R
IOMemSp
Register: 0x014
Mem0 Base Address Low
Read/Write
31
0
0
0
0
15
Mem0BAddL (Least Significant)
0
0
0
0
Mem0BAddL Mem0 Base Address Low (Read/Write)
Prefetch
Type
IOMemSp
PCI/Multifunction PCI Configuration Registers
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
I/O Base Address (Read/Write)
Indicates location of I/O space required by the device and
is fixed at a size of 256 bytes.
Reserved
Reserved for future use.
I/O or Memory Space Indicator (Read Only)
This bit is set to "1" to indicate I/O space mapping.
Mem0BAddL (Most Significant)
0
0
0
0
0
0
0
0
Indicates lower 32 bits of the 64-bit memory address
width, and the location of memory required by the device.
Its size is programmable from 16 Kbytes (2
512 Kbytes (2
bits [27:24] of the PCI Config0 register). The default value
indicated is 64 Kbytes, unless firmware programs a
different value prior to PCI configuration, or if
programmed with the serial EPROM.
Prefetchable Memory Block
With this bit set, there are no side effects to prefetching.
For reads, all bytes can be sent regardless of the state of
the byte enables. For writes, sequential writes can be
combined into a burst.
Location of Memory
With bit 2 = 1 and bit 1 = 0, the user can map this device
anywhere in the 64-bit space.
I/O or Memory Space Indicator (Read Only)
This bit is set to "0" to indicate Memory Space mapping.
0
0
0
0
4
0
0
0
0
19
) in steps of powers of 2 (based on
[31:8]
0
0
0
3
2
1
Prefetch
Type
IOMemSp
0
1
0
[31:4]
14
) through
[7:1]
0
16
0
0
0
3
[2:1]
0
5-15

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