Pci Interface Timings - LSI LSIFC929 Technical Manual

6.2.1.1 PCI Interface Timings

Table 6.11 PCI Interface Timings
Symbol Parameter
t Shared signal input setup time
1
t Shared signal input hold time
2
t CLK to shared signal output valid
3
t Side signal input setup time
4
t Side signal input hold time
5
t CLK to side signal output valid
6
AC Timing
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
33 MHz
Min Max Min
7 – 3
0 – 0
2 11 2
10 – 5
0 – 0
2 12 2
66 MHz
Max Unit
– ns
– ns
6 ns
– ns
– ns
6 ns
6-17